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AD5343BRUZ-REEL

更新时间： 2024-11-07 20:02:23
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管转换器
页数 文件大小 规格书
20页 417K
描述
+2.5V to 5.5V, 230µA Dual Rail-to-Rail Voltage Output 12-Bit DAC with Byte-Load Parallel Interface in 20-lead TSSOP

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AD5343BRUZ-REEL 数据手册

 浏览型号AD5343BRUZ-REEL的Datasheet PDF文件第2页浏览型号AD5343BRUZ-REEL的Datasheet PDF文件第3页浏览型号AD5343BRUZ-REEL的Datasheet PDF文件第4页浏览型号AD5343BRUZ-REEL的Datasheet PDF文件第5页浏览型号AD5343BRUZ-REEL的Datasheet PDF文件第6页浏览型号AD5343BRUZ-REEL的Datasheet PDF文件第7页 
2.5 V to 5.5 V, 230 ␮A, Parallel Interface  
Dual Voltage-Output 8-/10-/12-Bit DACs  
a
AD5332/AD5333/AD5342/AD5343*  
FEATURES  
GENERAL DESCRIPTION  
AD5332: Dual 8-Bit DAC in 20-Lead TSSOP  
AD5333: Dual 10-Bit DAC in 24-Lead TSSOP  
AD5342: Dual 12-Bit DAC in 28-Lead TSSOP  
AD5343: Dual 12-Bit DAC in 20-Lead TSSOP  
Low Power Operation: 230 ␮A @ 3 V, 300 ␮A @ 5 V  
via PD Pin  
Power-Down to 80 nA @ 3 V, 200 nA @ 5 V  
2.5 V to 5.5 V Power Supply  
Double-Buffered Input Logic  
Guaranteed Monotonic by Design Over All Codes  
Buffered/Unbuffered Reference Input Options  
Output Range: 0–VREF or 0–2 VREF  
The AD5332/AD5333/AD5342/AD5343 are dual 8-, 10-, and  
12-bit DACs. They operate from a 2.5 V to 5.5 V supply con-  
suming just 230 µA at 3 V, and feature a power-down pin, PD  
that further reduces the current to 80 nA. These devices incor-  
porate an on-chip output buffer that can drive the output to  
both supply rails, while the AD5333 and AD5342 allow a choice  
of buffered or unbuffered reference input.  
The AD5332/AD5333/AD5342/AD5343 have a parallel interface.  
CS selects the device and data is loaded into the input registers  
on the rising edge of WR.  
The GAIN pin on the AD5333 and AD5342 allows the output  
range to be set at 0 V to VREF or 0 V to 2 × VREF  
.
Power-On Reset to Zero Volts  
Simultaneous Update of DAC Outputs via LDAC Pin  
Asynchronous CLR Facility  
Low Power Parallel Data Interface  
On-Chip Rail-to-Rail Output Buffer Amplifiers  
Temperature Range: –40؇C to +105؇C  
Input data to the DACs is double-buffered, allowing simultaneous  
update of multiple DACs in a system using the LDAC pin.  
An asynchronous CLR input is also provided, which resets the  
contents of the Input Register and the DAC Register to all zeros.  
These devices also incorporate a power-on reset circuit that ensures  
that the DAC output powers on to 0 V and remains there until  
valid data is written to the device.  
APPLICATIONS  
Portable Battery-Powered Instruments  
Digital Gain and Offset Adjustment  
Programmable Voltage and Current Sources  
Programmable Attenuators  
The AD5332/AD5333/AD5342/AD5343 are available in Thin  
Shrink Small Outline Packages (TSSOP).  
Industrial Process Control  
AD5332 FUNCTIONAL BLOCK DIAGRAM  
(Other Diagrams Inside)  
V
A
V
DD  
REF  
POWER-ON  
RESET  
AD5332  
DAC  
INPUT  
DB  
8-BIT  
DAC  
7
.
.
.
V
V
A
B
BUFFER  
REGISTER  
OUT  
REGISTER  
DB  
0
INTER-  
FACE  
LOGIC  
CS  
WR  
A0  
DAC  
REGISTER  
INPUT  
REGISTER  
8-BIT  
DAC  
BUFFER  
OUT  
RESET  
POWER-DOWN  
LOGIC  
CLR  
LDAC  
V
B
GND  
PD  
REF  
*Protected by U.S. Patent Number 5,969,657  
.
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  
1234567...20

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AD5343BRUZ-REEL 替代型号

型号 品牌 替代类型 描述 数据表
AD5343BRU-REEL ADI

完全替代

 DUAL, PARALLEL, WORD INPUT LOADING, 8us SETTLING TIME, 12-BIT DAC, PDSO20, TSSOP-20
AD5342BRUZ ADI

类似代替

 2.5 V to 5.5 V, 230 muA, Parallel Interface Dual Voltage-Output 8-/10-/12-Bit DACs

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