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AD5341BRUZ-REEL71 PDF预览

AD5341BRUZ-REEL71

更新时间: 2022-04-12 22:44:08
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
28页 542K
描述
2.5 V to 5.5 V, 115 μA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs

AD5341BRUZ-REEL71 数据手册

 浏览型号AD5341BRUZ-REEL71的Datasheet PDF文件第1页浏览型号AD5341BRUZ-REEL71的Datasheet PDF文件第3页浏览型号AD5341BRUZ-REEL71的Datasheet PDF文件第4页浏览型号AD5341BRUZ-REEL71的Datasheet PDF文件第5页浏览型号AD5341BRUZ-REEL71的Datasheet PDF文件第6页浏览型号AD5341BRUZ-REEL71的Datasheet PDF文件第7页 
AD5330/AD5331/AD5340/AD5341  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Double-Buffered Interface ........................................................ 18  
CLR  
Applications....................................................................................... 1  
General Description......................................................................... 1  
Functional Block Diagram .............................................................. 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
AC Characteristics........................................................................ 4  
Timing Characteristics ................................................................ 5  
Absolute Maximum Ratings............................................................ 6  
ESD Caution.................................................................................. 6  
Pin Configurations and Function Descriptions ........................... 7  
Terminology .................................................................................... 11  
Typical Performance Characteristics ........................................... 13  
Theory of Operation ...................................................................... 17  
Digital-to-Analog Section......................................................... 17  
Resistor String............................................................................. 17  
DAC Reference Input................................................................. 17  
Output Amplifier........................................................................ 17  
Parallel Interface ............................................................................. 18  
Clear Input (  
Chip Select Input ( )............................................................... 18  
WR  
) ...................................................................... 18  
CS  
)....................................................................... 18  
LDAC  
Write Input (  
Load DAC Input (  
).......................................................... 18  
High-Byte Enable Input (HBEN)............................................. 18  
Power-On Reset.......................................................................... 18  
Power-Down Mode ........................................................................ 19  
Suggested Databus Formats .......................................................... 20  
Applications Information.............................................................. 21  
Typical Application Circuits ..................................................... 21  
Driving VDD From the Reference Voltage ............................... 21  
Bipolar Operation Using the AD5330/AD5331/  
AD5340/AD5341......................................................................... 21  
Decoding Multiple AD5330/AD5331/ AD5340/AD5341 .... 21  
Programmable Current Source ................................................ 22  
Power Supply Bypassing and Grounding................................ 22  
Outline Dimensions....................................................................... 24  
Ordering Guide .......................................................................... 25  
REVISION HISTORY  
2/08—Rev. 0 to Rev. A  
Updated Format..................................................................Universal  
Changes to Table 4.......................................................................... 16  
Replaced Driving VDD from the Reference Voltage Section ..... 21  
Updated Outline Dimensions....................................................... 24  
Changes to Ordering Guide .......................................................... 25  
4/00—Revision 0: Initial Version  
Rev. A | Page 2 of 28  
 

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