5秒后页面跳转
AD5293BRUZ-20 PDF预览

AD5293BRUZ-20

更新时间: 2024-02-25 04:33:15
品牌 Logo 应用领域
亚德诺 - ADI 数字电位计
页数 文件大小 规格书
20页 687K
描述
Single-Channel, 1024-Position, 1% R-Tolerance Digital Potentiometer

AD5293BRUZ-20 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.72
其他特性:DEVICE SUPPORTS DUAL SUPPLY OPERATION标称带宽:0.52 kHz
控制接口:3-WIRE SERIAL转换器类型:DIGITAL POTENTIOMETER
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:5 mm湿度敏感等级:1
标称负供电电压:-15 V功能数量:1
位置数:1024端子数量:14
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:+-10.5/+-16.5/21/33 V认证状态:Not Qualified
电阻定律:LINEAR最大电阻容差:1%
最大电阻器端电压:16.5 V最小电阻器端电压:-9 V
座面最大高度:1.2 mm子类别:Digital Potentiometers
标称供电电压:15 V表面贴装:YES
技术:CMOS标称温度系数:35 ppm/ °C
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
标称总电阻:20000 Ω宽度:4.4 mm
Base Number Matches:1

AD5293BRUZ-20 数据手册

 浏览型号AD5293BRUZ-20的Datasheet PDF文件第12页浏览型号AD5293BRUZ-20的Datasheet PDF文件第13页浏览型号AD5293BRUZ-20的Datasheet PDF文件第14页浏览型号AD5293BRUZ-20的Datasheet PDF文件第16页浏览型号AD5293BRUZ-20的Datasheet PDF文件第17页浏览型号AD5293BRUZ-20的Datasheet PDF文件第18页 
AD5293  
The SDO pin contains an open-drain N-channel FET that requires  
a pull-up resistor, if this function is used. As shown in Figure 32,  
the SDO pin of one package must be tied to the DIN pin of the  
next package. Users may need to increase the clock period because  
the pull-up resistor and the capacitive loading at the SDO/DIN  
interface may require an additional time delay between subsequent  
devices.  
RESET  
RESET  
A low-to-high transition of the hardware  
pin loads the  
RDAC register with midscale. The AD5293 can also be reset  
through software by executing Command 3 (see Table 8). The  
control register is restored with default settings (see Table 10).  
RESISTOR PERFORMANCE MODE  
This mode activates a new, patented 1% end-to-end resistor  
tolerance that ensures a 1% resistor tolerance on each code,  
that is, code = half scale, RWB = 10 kΩ 100 Ω. See Table 2 to  
verify which codes achieve 1% resistor tolerance. The resistor  
performance mode is activated by programming Bit C2 of the  
control register (see Table 9 and Table 10). The typical settling  
time is shown in Figure 23.  
When two AD5293 devices are daisy-chained, 32 bits of data are  
required. The first 16 bits go to U2, and the second 16 bits go to U1.  
SYNC  
The  
pin should be held low until all 32 bits are clocked into  
SYNC  
their respective serial registers. The  
to complete the operation.  
pin is then pulled high  
V
LOGIC  
R
2.2kΩ  
P
AD5293  
AD5293  
DAISY-CHAIN OPERATION  
MOSI  
MICRO-  
CONTROLLER  
SCLK SS  
DIN  
SDO  
The serial data output pin (SDO) serves two purposes. It can be  
used to read the contents of the wiper setting, using Command 2  
(see Table 8), or it can be used for daisy-chaining multiple devices.  
The remaining instructions are valid for daisy-chaining multiple  
devices in simultaneous operations. Daisy chaining minimizes  
the number of port pins required from the controlling IC.  
DIN  
SDO  
U1  
U2  
SYNC  
SCLK  
SYNC  
SCLK  
Figure 32. Daisy-Chain Configuration Using SDO  
Table 8. Command Operation Truth Table  
Command Bits[B13:B10]  
Data Bits[B9:B0]1  
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Operation  
NOP command. Do nothing.  
Command C3  
C2  
0
C1  
0
C0  
0
0
1
0
0
X
X
X
X
X
X
X
X
X
X
0
0
1
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0  
Write contents of serial register data  
to RDAC.  
2
0
0
1
0
X
X
X
X
X
X
X
X
X
X
X
X
Read RDAC wiper setting from SDO  
output in the next frame.  
3
4
0
0
1
1
0
1
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Reset. Refresh RDAC with midscale code.  
D2 D1  
Write contents of serial register data to  
control register.  
5
6
0
1
1
0
1
0
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Read control register from SDO output  
in the next frame.  
D0  
Software power-down.  
D0 = 0 (normal mode).  
D0 = 1 (device placed in shutdown  
mode).  
1 X = don’t care.  
Table 9. Control Register Bit Map  
D9  
X1  
D8  
X1  
D7  
X1  
D6  
X1  
D5  
X1  
D4  
X1  
D3  
X1  
D2  
D1  
D0  
X1  
C2  
C1  
1 X = don’t care.  
Table 10. Control Register Bit Descriptions  
Register Name Bit Name Description  
Calibration enable.  
Control  
C2  
0 = Resistor Performance Mode (default).  
1 = Normal Mode.  
C1  
RDAC register write protect.  
0 = locks the wiper position through the digital interface (default).  
1 = allows update of wiper position through digital interface.  
Rev. 0 | Page 15 of 20  
 
 
 
 
 
 
 

AD5293BRUZ-20 替代型号

型号 品牌 替代类型 描述 数据表
AD5293BRUZ-20-RL7 ADI

类似代替

Single-Channel, 1024-Position, 1% R-Tolerance Digital Potentiometer

与AD5293BRUZ-20相关器件

型号 品牌 获取价格 描述 数据表
AD5293BRUZ-20-RL7 ADI

获取价格

Single-Channel, 1024-Position, 1% R-Tolerance Digital Potentiometer
AD5293BRUZ-50 ADI

获取价格

Single-Channel, 1024-Position, 1percent R-Tolerance Digital Potentiometer
AD5293BRUZ-50-RL7 ADI

获取价格

Single-Channel, 1024-Position, 1percent R-Tolerance Digital Potentiometer
AD52X1B ADI

获取价格

12 BIT SUCCESSIVE APPROXIMATION HIGH ACCURACY A/D CONVERTERS
AD52X1T ADI

获取价格

12 BIT SUCCESSIVE APPROXIMATION HIGH ACCURACY A/D CONVERTERS
AD52X2B ADI

获取价格

12 BIT SUCCESSIVE APPROXIMATION HIGH ACCURACY A/D CONVERTERS
AD52X2T ADI

获取价格

12 BIT SUCCESSIVE APPROXIMATION HIGH ACCURACY A/D CONVERTERS
AD52X5B ADI

获取价格

12 BIT SUCCESSIVE APPROXIMATION HIGH ACCURACY A/D CONVERTERS
AD52X5T ADI

获取价格

12 BIT SUCCESSIVE APPROXIMATION HIGH ACCURACY A/D CONVERTERS
AD53/009-9 ADI

获取价格

GSM Baseband Processing Chipset