2.7 V to 5.5 V, 140 μA, Rail-to-Rail Output
8-Bit DAC in a SOT-23
AD5300
FUNCTIONAL BLOCK DIAGRAM
FEATURES
V
DD
GND
Single 8-Bit DAC
6-Lead SOT-23 and 8-Lead MSOP Packages
Micropower Operation: 140 μA @ 5 V
Power-Down to 200 nA @ 5 V, 50 nA @ 3 V
2.7 V to 5.5 V Power Supply
Guaranteed Monotonic by Design
Reference Derived from Power Supply
Power-On Reset to 0 V
POWER-ON
RESET
AD5300
REF (+) REF (–)
DAC
REGISTER
OUTPUT
BUFFER
8-BIT
DAC
V
OUT
INPUT
CONTROL
LOGIC
POWER-DOWN
CONTROL LOGIC
RESISTOR
NETWORK
3 Power-Down Functions
Low Power Serial Interface with Schmitt-Triggered Inputs
On-Chip Output Buffer Amplifier, Rail-to-Rail Operation
SYNC Interrupt Facility
SYNC SCLK DIN
Qualified for automotive applications
APPLICATIONS
Portable Battery-Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD5300 is a single, 8-bit buffered voltage output DAC that
operates from a single 2.7 V to 5.5 V supply, consuming 115 μA
at 3 V. Its on-chip precision output amplifier allows rail-to-rail
output swing to be achieved. The AD5300 uses a versatile 3-wire
serial interface that operates at clock rates up to 30 MHz and is
compatible with standard SPI®, QSPI™, MICROWIRE™, and
DSP interface standards.
The reference for the AD53001 is derived from the power supply
inputs and thus gives the widest dynamic output range. The part
incorporates a power-on reset circuit that ensures that the DAC
output powers up to 0 V and remains there until a valid write takes
place to the device. The part contains a power-down feature that
reduces the current consumption of the device to 200 nA at 5 V
and provides software selectable output loads while in power-
down mode. The part is put into power-down mode over the
serial interface.
1. Available in 6-lead SOT-23 and 8-lead MSOP packages.
2. Low power, single-supply operation. This part operates from a
single 2.7 V to 5.5 V supply and typically consumes 0.35 mW
at 3 V and 0.7 mW at 5 V, making it ideal for battery-powered
applications.
3. The on-chip output buffer amplifier allows the output of
the DAC to swing rail-to-rail with a slew rate of 1 V/μs.
4. Reference derived from the power supply.
5. High speed serial interface with clock speeds up to 30 MHz.
Designed for very low power consumption. The interface
powers up only during a write cycle.
6. Power-down capability. When powered down, the DAC
typically consumes 50 nA at 3 V and 200 nA at 5 V.
The low power consumption of this part in normal operation
makes it ideally suited to portable battery-operated equipment.
The power consumption is 0.7 mW at 5 V, reducing to 1 μW in
power-down mode.
The AD5300 is one of a family of pin-compatible DACs. The
AD5310 is the 10-bit version, and the AD5320 is the 12-bit
version. The AD5300/AD5310/AD5320 are available in 6-lead
SOT-23 packages and 8-lead MSOP packages.
1 Patent pending; protected by U.S. Patent No. 5684481.
Rev. D
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