Data Sheet
AD4630-16/AD4632-16
REGISTER DETAILS
CHANNEL 0 OFFSET REGISTERS
Address: 0x17, Reset: 0x00, Name: OFFSET_CH0_LB
Table 32. Bit Descriptions for OFFSET_CH0_LB
Bits
Bit Name
Description
Reset
Access
[7:0]
CH0_USER_OFFSET[7:0]
16-Bit Channel 0 Offset. Twos complement (signed). 1 LSB = (VREF/215)/gain. See the Channel 0 Gain 0x0
Registers section for a description of the gain parameter.
R/W
Address: 0x18, Reset: 0x00, Name: OFFSET_CH0_HB
Table 33. Bit Descriptions for OFFSET_CH0_HB
Bits
Bit Name
Description
Reset
Access
[7:0]
CH0_USER_OFFSET[15:8]
16-Bit Channel 0 Offset. Twos complement (signed). 1 LSB = (VREF/215)/gain. See the Channel 0
Gain Registers section for a description of the gain parameter.
0x0
R/W
CHANNEL 1 OFFSET REGISTERS
Address: 0x1A, Reset: 0x00, Name: OFFSET_CH1_LB
Table 34. Bit Descriptions for OFFSET_CH1_LB
Bits
Bit Name
Description
Reset
Access
[7:0]
CH1_USER_OFFSET[7:0]
16-Bit Channel 1 Offset. Twos complement (signed). 1 LSB = (VREF/215)/gain. See the Channel 1 Gain 0x0
Registers section for a description of the gain parameter value.
R/W
Address: 0x1B, Reset: 0x00, Name: OFFSET_CH1_HB
Table 35. Bit Descriptions for OFFSET_CH1_HB
Bits
Bit Name
Description
Reset
Access
[7:0]
CH1_USER_OFFSET[15:8]
16-Bit Channel 1 Offset. Twos complement (signed). 1 LSB = (VREF/215)/gain. See the Channel 1
Gain Registers section for a description of the gain parameter value.
0x0
R/W
CHANNEL 0 GAIN REGISTERS
Address: 0x1C, Reset: 0x00, Name: GAIN_CH0_LB
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