Data Sheet
AD4684/AD4685
1 MSPS/500 kSPS, 4-Channel, 16-Bit Dual, Simultaneous Sampling SAR ADCs
FEATURES
GENERAL DESCRIPTION
► 16-bit dual simultaneous sampling SAR ADC
► Single-ended analog inputs
► 4-channel with 2:1 multiplexers
► Channel sequencer mode
► Throughput rate
The AD4684/AD4685 are 16-bit, dual, simultaneous sampling, high
speed, successive approximation register (SAR), analog-to-digital
converters (ADCs) that operate from a 3.0 V to 3.6 V power supply
and feature throughput rates of up to 1 MSPS for the AD4684 and
500 kSPS for the AD4685. The analog input types are single-ended
and are sampled and converted on the falling edge of CS.
► 1 MSPS (AD4684)
The AD4684/AD4685 have an on-chip sequencer and integrated
on-chip oversampling block to improve dynamic range and reduce
noise at lower bandwidths. A buffered internal 2.5 V reference is
included. Alternatively, an external reference up to 3.3 V can be
used. The conversion process and data acquisition use standard
control inputs, allowing interfacing to microprocessors or digital
signal processors (DSPs). The AD4684/AD4685 is compatible with
1.8 V, 2.5 V, and 3.3 V interfaces by using the separate logic supply.
The AD4684/AD4685 are available in a 16-lead, 3 mm × 3 mm lead
frame chip scale package (LFCSP) with operation specified from
−40°C to +125°C.
► 500 kSPS (AD4685)
► SNR (typical)
► 87.5 dB with VREF = 3.3 V external
► 93 dB with OSR_MODE = 1, OSR = 8, RES = 1, VREF = 2.5 V
internal
► On-chip oversampling functions
► INL ±1.5 LSB (typical)
► Resolution boost function
► 2.5 V internal reference at 10 ppm/°C (maximum)
► Alert function
► −40°C to +125°C temperature range
► 16-lead, 3 mm × 3 mm LFCSP
PRODUCT HIGHLIGHTS
1. 4-channel, dual simultaneous sampling ADC.
2. Pin-compatible product family.
3. High throughput rate: 1 MSPS (AD4684) and 500 kSPS
APPLICATIONS
► Motor control position feedback
► Motor control current sense
► Sonars
(AD4685).
4. Space-saving, 16-lead, 3 mm × 3 mm LFCSP.
5. Integrated oversampling block to increase dynamic range and
SNR and to reduce SCLK speed requirements.
6. Single-ended analog inputs.
► Power quality
► Data acquisition systems
► Erbium doped fiber amplifier (EDFA) applications
► Inphase and quadrature demodulation
7. Small sampling capacitor reduces amplifier drive burden.
FUNCTIONAL BLOCK DIAGRAM
Figure 1. Functional Block Diagram
Rev. A
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