WiMAX/WiBro RF
MxFE Transceiver
AD9352
FEATURES
FUNCTIONAL BLOCK DIAGRAM
RF transceiver with integrated ADCs and DACs
IEEE 802.16 WiMAX/WiBro
2.3 GHz to 2.7 GHz
ADC
ADC
Rx
TxNRx
3.5 MHz < BW < 20 MHz
Superior receiver sensitivity with NF 3.7 dB
Highly linear and spectrally pure transmitter
Tx EVM −38 dB
SNR > 134 dB/Hz at FOFFSET > 22 MHz
Tx power control
DATA
AD9352
SYNC
POWER
DETECT
DAC
DAC
SYNC_VALID
Tx
Σ
Range: 0 dB to 58 dB
Resolution: 0.25 dB
Autonomous AGC and Tx power control
Automatic frequency correction < 0.012 ppm
Integrated Frac-N synthesizer
8 Hz LO step size
CLK_OUT
REF_XTAL
CLK/LO
SYNTH
RADIO
SWITCHING
GPO
CTRL
LDOs
Integrated phase noise < 0.4°rms
CTRL AUX ADC AUX DAC
APPLICATIONS
Figure 1.
WiMAX/WiBro/BWA
GENERAL DESCRIPTION
The AD9352 is a fully integrated transceiver for IEEE 802.16
WiMAX and WiBro wireless network systems. The RF MxFE™
combines the RF front-end with mixed-signal baseband enabling
an easy-to-use digital interface to the baseband ASIC or FPGA.
The AD9352 operates in the 2.3 GHz to 2.7 GHz range covering
most of the licensed and unlicensed bands. Channel bandwidths
of 3.5 MHz, 4.375 MHz, 5 MHz, 7 MHz, 8.75 MHz, 10 MHz,
14 MHz, 17.5 MHz, and 20 MHz are supported.
The highly linear transmit path has excellent spectral purity
with sideband noise less than −134 dBc/Hz at 22 MHz offset
and offers EVM of −38 dB at 0 dBm output power. The transmit
power is detected by an accurate power detector and autono-
mously controlled with a range of 58 dB and 0.25 dB steps. The
output power can be calibrated at the factory by a single meas-
urement.
The reference frequency is produced by an internal crystal
oscillator with a digital programmable frequency with 0.012 ppm
resolution thus reducing the total bill of materials of the device.
The direct-conversion receiver has state-of-the-art noise figure
and linearity and requires no external components with the
exception of a balun. The complete RF subsystem integrates an
autonomous AGC loop and dc offset corrections, thus elimi-
nating the need for high speed interaction with the baseband
processor. The received signal strength indicator (RSSI) has
over 80 dB of dynamic range with 0.5 dB resolution and is
accessible via the serial interface.
An internal auxiliary ADC and two auxiliary DACs are avail-
able for system monitoring and control. Three general purpose
I/Os are also included and can be register programmed or auto-
matically sequenced by a user-defined state machine. Mode control
is via a 4-wire serial port and four real-time I/O control pins.
The AD9352 is powered from a single 3.3 V supply and contains
on-chip LDOs for each function to eliminate external regula-
tors. The AD9352 is packaged in a 9 mm × 9 mm, 64-lead LFCSP.
The received signal is digitized with a high dynamic range
12-bit ADC. Decimation and channel filters produce a 10-bit
output signal at the appropriate sample rate determined by the
bandwidth mode. The transmit path takes a 10-bit input data
and interpolates before converting to the analog domain and
upconverting to the carrier frequency.
For more information on the AD9352, e-mail Analog Devices,
Inc. at wimaxtransceivers@analog.com.
Rev. Sp0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2007 Analog Devices, Inc. All rights reserved.
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