RF Agile Transceiver
AD9364
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
RF 1 × 1 transceiver with integrated 12-bit DACs and ADCs
Band: 70 MHz to 6.0 GHz
AD9364
RXB_P,
RXB_N
RXA_P,
RXA_N
Supports time division duplex (TDD) and frequency division
duplex (FDD) operation
Tunable channel bandwidth (BW): <200 kHz to 56 MHz
3-band receiver: 3 differential or 6 single-ended inputs
Superior receiver sensitivity with a noise figure of <2.5 dB
Rx gain control
Real-time monitor and control signals for manual gain
Independent automatic gain control
2-band differential output transmitter
Highly linear broadband transmitter
Tx EVM: ≤−40 dB
ADC
P0_[D11:D0]/
TX_[D5:D0]
RXC_P,
RXC_N
Rx LO
Tx LO
P1_[D11:D0]/
RX_[D5:D0]
TX_MON
TXA_P,
TXA_N
DAC
TXB_P,
TXB_N
RADIO
SWITCHING
GPO
PLLs
SPI
CTRL
CLK_OUT
CTRL
AUXADC AUXDACx
XTALN
NOTES
Tx noise: ≤−157 dBm/Hz noise floor
Tx monitor: ≥66 dB dynamic range with 1 dB accuracy
Integrated fractional-N synthesizers
1. SPI, CTRL, P0_[D11:D0]/TX_[D5:D0], P1_[D11:D0]/RX_[D5:D0],
AND RADIO SWITCHING CONTAIN MULTIPLE PINS.
Figure 1.
2.4 Hz maximum local oscillator (LO) step size
Multichip synchronization
CMOS/LVDS digital interface
APPLICATIONS
Point to point communication systems
Femtocell/picocell/microcell base stations
General-purpose radio systems
GENERAL DESCRIPTION
The AD9364 is a high performance, highly integrated radio fre-
quency (RF) Agile Transceiver™ designed for use in 3G and 4G base
station applications. Its programmability and wideband capability
make it ideal for a broad range of transceiver applications.
and 128-tap FIR filters to produce a 12-bit output signal at the
appropriate sample rate.
The transmitter uses a direct conversion architecture that achieves
high modulation accuracy with ultralow noise. This transmitter
design produces a Tx EVM of ≤−40 dB, allowing significant system
margin for the external power amplifier (PA) selection. The on-
board transmit (Tx) power monitor can be used as a power
detector, enabling highly accurate Tx power measurements.
The device combines an RF front end with a flexible mixed-signal
baseband section and integrated frequency synthesizers, simpli-
fying design-in by providing a configurable digital interface to a
processor. The AD9364 operates in the 70 MHz to 6.0 GHz range,
covering most licensed and unlicensed bands. Channel bandwidths
from less than 200 kHz to 56 MHz are supported.
The fully integrated phase-locked loops (PLLs) provide low
power fractional-N frequency synthesis for all Rx and Tx channels.
All VCO and loop filter components are integrated.
The direct conversion receiver has state-of-the-art noise figure
and linearity. The receive (Rx) subsystem includes independent
automatic gain control (AGC), dc offset correction, quadrature
correction, and digital filtering, thereby eliminating the need for
these functions in the digital baseband. The AD9364 also has
flexible manual gain modes that can be externally controlled.
Two high dynamic range ADCs digitize the received I and Q
signals and pass them through configurable decimation filters
The core of the AD9364 can be powered directly from a 1.3 V
regulator. The IC is controlled via a standard 4-wire serial port and
four real-time input control pins. Comprehensive power-down
modes are included to minimize power consumption during
normal use. The AD9364 is packaged in a 10 mm × 10 mm,
144-ball chip scale package ball grid array (CSP_BGA).
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2013–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
5秒后页面跳转
三星深化印度制造布局，供应链本地化进程加速
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
纳微科技震撼发布GaNSlim革新氮化镓功率芯片
意法半导体发布第四代SiC技术，助力电动汽车电驱
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
