Integrated, Dual RF Transceiver
with Observation Path
AD9375
Data Sheet
The transceiver consists of wideband direct conversion signal
paths with state-of-the-art noise figure and linearity. Each complete
Rx and Tx subsystem includes dc offset correction, quadrature error
correction (QEC), and programmable digital filters, eliminating
the need for these functions in the digital baseband. Several
auxiliary functions such as an auxiliary analog-to-digital converter
(ADC), auxiliary digital-to-analog converters (DACs), and general-
purpose input/outputs (GPIOs) are integrated to provide additional
monitoring and control capability.
FEATURES
Dual differential Tx
Dual differential Rx
Observation receiver with 2 inputs
Fully integrated, ultralow power DPD actuator and adaptation
engine for PA linearization
Sniffer receiver with 3 inputs
Tunable range: 300 MHz to 6000 MHz
Linearization signal BW to 40 MHz
Tx synthesis BW to 250 MHz
An ORx channel with two inputs is included to monitor each Tx
output and implement calibration applications. This channel also
connects to three sniffer receiver (SnRx) inputs that can monitor
radio activity in different bands.
Rx BW: 8 MHz to 100 MHz
Supports FDD and TDD operation
Fully integrated independent fractional-N RF synthesizers for
Tx, Rx, ORx, and clock generation
JESD204B digital interface
The high speed JESD204B interface supports lane rates up to
6144 Mbps. Four lanes are dedicated to the transmitters and four
lanes are dedicated to the receiver and observation receiver channels.
APPLICATIONS
3G/4G small cell base transceiver station (BTS)
3G/4G massive MIMO/active antenna systems
The fully integrated phase-locked loops (PLLs) provide high
performance, low power, fractional-N frequency synthesis for
the Tx, the Rx, the ORx, and the clock sections. Careful design
and layout techniques provide the isolation demanded in high
performance base station applications. All voltage controlled
oscillator (VCO) and loop filter components are integrated to
minimize the external component count.
GENERAL DESCRIPTION
The AD9375 is a highly integrated, wideband radio frequency (RF)
transceiver offering dual-channel transmitters (Tx) and receivers
(Rx), integrated synthesizers, a fully integrated digital predistortion
(DPD) actuator and adaptation engine, and digital signal processing
functions. The IC delivers a versatile combination of high
performance and low power consumption required by 3G/4G
small cell and massive multiple input, multiple output (MIMO)
equipment in both frequency division duplex (FDD) and time
division duplex (TDD) applications. The AD9375 operates from
300 MHz to 6000 MHz, covering most of the licensed and unlicensed
cellular bands. The DPD algorithm supports linearization on
signal bandwidths up to 40 MHz depending on the power amplifier
(PA) characteristics (for example, two adjacent 20 MHz carriers).
The IC supports Rx bandwidths up to 100 MHz. It also supports
observation receiver (ORx) and Tx synthesis bandwidths up to
250 MHz to accommodate digital correction algorithms.
The device contains a fully integrated, low power DPD actuator
and adaptation engine for use in PA linearization. The DPD feature
enables use of high efficiency PAs, significantly reducing the power
consumption of small cell base station radios while also reducing
the number of JESD204B lanes necessary to interface with baseband
processors.
A 1.3 V supply is required to power the AD9375 core, and a
standard 4-wire serial port controls it. Other voltage supplies
provide proper digital interface levels and optimize transmitter
and auxiliary converter performance. The
AD9375 is packaged in a
12 mm × 12 mm, 196-ball chip scale ball grid array (CSP_BGA).
Rev. 0
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