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AD9371BBCZ-REEL PDF预览

AD9371BBCZ-REEL

更新时间: 2022-02-26 12:08:17
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亚德诺 - ADI /
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60页 1888K
描述
Dual differential transmitters

AD9371BBCZ-REEL 数据手册

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Integrated, Dual RF Transceiver  
with Observation Path  
AD9371  
Data Sheet  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
AD9371  
Dual differential transmitters (Tx)  
Dual differential receivers (Rx)  
RX1+  
RX1  
DECIMATION,  
RX1–  
RX2+  
LPF  
LPF  
RX2  
pFIR,  
DC OFFSET  
QEC,  
Observation receiver (ORx) with 2 inputs  
Sniffer receiver (SnRx) with 3 inputs  
Tunable range: 300 MHz to 6000 MHz  
Tx synthesis bandwidth (BW) to 250 MHz  
Rx BW: 8 MHz to 100 MHz  
Supports frequency division duplex (FDD) and time division  
duplex (TDD) operation  
Fully integrated independent fractional-N radio frequency (RF)  
synthesizers for Tx, Rx, ORx, and clock generation  
JESD204B digital interface  
ADC  
ADC  
TUNING,  
RSSI,  
OVERLOAD  
RX2–  
MICRO-  
CONTROLLER  
RX_EXTLO+  
RX_EXTLO–  
LO  
GENERATOR  
RF  
SYNTHESIZER  
EXTERNAL  
OPTION  
TX1+  
SPI  
TX1  
TX2  
PORT  
TX1–  
TX2+  
LPF  
DAC  
DAC  
pFIR,  
QEC,  
INTERPOLATION  
TX2–  
LPF  
APPLICATIONS  
TX_EXTLO+  
TX_EXTLO–  
LO  
GENERATOR  
RF  
SYNTHESIZER  
GPIO  
AUXADC  
AUXDAC  
EXTERNAL  
OPTION  
3G/4G micro and macro base stations (BTS)  
3G/4G multicarrier picocells  
LO  
GENERATOR  
FDD and TDD active antenna systems  
Microwave, nonline of sight (NLOS) backhaul systems  
RF  
SYNTHESIZER  
CLOCK  
GENERATOR  
OBSERVATION  
GENERAL DESCRIPTION  
Rx  
ORX1+  
ORX1–  
The AD9371 is a highly integrated, wideband RF transceiver  
offering dual channel transmitters and receivers, integrated  
synthesizers, and digital signal processing functions. The IC  
delivers a versatile combination of high performance and low  
power consumption required by 3G/4G micro and macro BTS  
equipment in both FDD and TDD applications. The AD9371  
operates from 300 MHz to 6000 MHz, covering most of the  
licensed and unlicensed cellular bands. The IC supports receiver  
bandwidths up to 100 MHz. It also supports observation receiver  
and transmit synthesis bandwidths up to 250 MHz to  
ORX2+  
ORX2–  
SNIFFER  
Rx  
SNRXA+  
SNRXA–  
SNRXB+  
SNRXB–  
SNRXC+  
SNRXC–  
DECIMATION,  
pFIR,  
LPF  
LPF  
ADC  
ADC  
AGC,  
DC OFFSET,  
QEC,  
TUNING,  
RSSI,  
OVERLOAD  
NOTES  
1. FOR JESD204B PINS, SEE FIGURE 4.  
Figure 1.  
accommodate digital correction algorithms.  
The high speed JESD204B interface supports lane rates up to  
6144 Mbps. Four lanes are dedicated to the transmitters and four  
lanes are dedicated to the receiver and observation receiver channels.  
The transceiver consists of wideband direct conversion signal  
paths with state-of-the-art noise figure and linearity. Each complete  
receiver and transmitter subsystem includes dc offset correction,  
quadrature error correction (QEC), and programmable digital  
filters, eliminating the need for these functions in the digital  
baseband. Several auxiliary functions such as an auxiliary analog-  
to-digital converter (ADC), auxiliary digital-to-analog converters  
(DACs), and general-purpose input/outputs (GPIOs) are integrated  
to provide additional monitoring and control capability.  
The fully integrated phase-locked loops (PLLs) provide high  
performance, low power fractional-N frequency synthesis for  
the transmitter, the receiver, the observation receiver, and the  
clock sections. Careful design and layout techniques provide the  
isolation demanded in high performance base station applications.  
All voltage controlled oscillator (VCO) and loop filter components  
are integrated to minimize the external component count.  
An observation receiver channel with two inputs is included to  
monitor each transmitter output and implement interference  
mitigation and calibration applications. This channel also connects  
to three sniffer receiver inputs that can monitor radio activity in  
different bands.  
A 1.3 V supply is required to power the core of the AD9371, and  
a standard 4-wire serial port controls it. Other voltage supplies  
provide proper digital interface levels and optimize transmitter  
and auxiliary converter performance. The AD9371 is packaged in a  
12 mm × 12 mm, 196-ball chip scale ball grid array (CSP_BGA).  
Rev. A  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2016 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 
 

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