HDMI™ Display Interface
AD9381
FUNCTIONAL BLOCK DIAGRAM
R/G/B 8 × 3
FEATURES
Internal HDCP keys
HDMI interface
Supports high bandwidth digital content protection
RGB to YCbCr 2-way color conversion
1.8 V/3.3 V power supply
100-lead Pb-free LQFP
SCL
SDA
SERIAL REGISTER
YCbCr (4:2:2
OR 4:4:4)
AND
POWER MANAGEMENT
2
DATACK
HSOUT
VSOUT
R/G/B 8 × 3
RGB and YCbCr output formats
Digital video interface
OR YCbCr
Rx0+
Rx0–
2
DATACK
Rx1+
HDMI 1.1, DVI 1.0
150 MHz HDMI receiver
Supports high bandwidth digital content protection
(HDCP 1.1)
HSYNC
VSYNC
Rx1–
HDMI RECEIVER
Rx2+
DE
Rx2–
DE
RxC+
RxC–
RTERM
S/PDIF
Digital audio interface
8-CHANNEL
HDMI 1.1-compatible audio interface
S/PDIF (IEC90658-compatible) digital audio output
Multichannel I2S audio output (up to 8 channels)
2
I S
MCLK
LRCLK
DDCSDA
DDCSCL
HDCP
HDCP KEYS
APPLICATIONS
AD9381
Advanced TVs
HDTVs
Figure 1.
Projectors
LCD monitors
GENERAL DESCRIPTION
The AD9381 offers a high definition multimedia interface
(HDMI) receiver integrated on a single chip. Also included is
support for high bandwidth digital content protection (HDCP)
via an internal key storage.
Fabricated in an advanced CMOS process, the AD9381 is
provided in a space-saving, 100-lead, surface-mount, Pb-free
plastic LQFP and is specified over the 0°C to 70°C temperature
range.
The AD9381 contains an HDMI 1.0-compatible receiver and
supports all HDTV formats (up to 1080p) and display
resolutions up to SXGA (1280×1024 @ 75 Hz). The receiver
features an intrapair skew tolerance of up to one full clock cycle.
With the inclusion of HDCP, displays may now receive
encrypted video content. The AD9381 allows for authentication
of a video receiver, decryption of encoded data at the receiver,
and renewability of that authentication during transmission as
specified by the HDCP 1.1 protocol.
Rev. 0
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rights ofthird parties that may result fromits use. Specifications subject to change without notice. No
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