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ACTS244DMSR-02 PDF预览

ACTS244DMSR-02

更新时间: 2024-11-11 14:47:35
品牌 Logo 应用领域
瑞萨 - RENESAS 驱动输出元件
页数 文件大小 规格书
3页 69K
描述
ACT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20, METAL SEALED, CERAMIC, DIP-20

ACTS244DMSR-02 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.01其他特性:RADIATION HARD CMOS/SILICON ON SAPPHIRE (SOS) TECHONOLOGY
系列:ACTJESD-30 代码:R-CDIP-T20
JESD-609代码:e3逻辑集成电路类型:BUS DRIVER
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):10 ns
认证状态:Not Qualified座面最大高度:5.08 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:MATTE TIN端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

ACTS244DMSR-02 数据手册

 浏览型号ACTS244DMSR-02的Datasheet PDF文件第2页浏览型号ACTS244DMSR-02的Datasheet PDF文件第3页 
ACTS244MS  
Radiation Hardened Octal  
Non-Inverting Three-State Buffer  
January 1996  
tle  
TS  
MS  
Features  
Pinouts  
20 PIN CERAMIC DUAL-IN-LINE  
MIL-STD-1835 DESIGNATOR CDIP2-T20,  
• Devices QML Qualified in Accordance with MIL-PRF-38535  
• Detailed Electrical and Screening Requirements are Contained in  
SMD# 5962-96718 and Intersil’s QM Plan  
LEAD FINISH C  
TOP VIEW  
-
• 1.25 Micron Radiation Hardened SOS CMOS  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
BE  
AE  
AI1  
ia-  
d-  
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)  
2
3
-10  
AO1  
BI4  
BO4  
AI2  
• Single Event Upset (SEU) Immunity: <1 x 10  
(Typ)  
Errors/Bit/Day  
4
5
2
BO3  
AI3  
AO2  
BI3  
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm /mg  
6
l
-
rt-  
11  
• Dose Rate Upset . . . . . . . . . . . . . . . . >10 RAD (Si)/s, 20ns Pulse  
7
AO3  
BI2  
BO2  
AI4  
12  
8
• Dose Rate Survivability. . . . . . . . . . . >10 RAD (Si)/s, 20ns Pulse  
9
BO1  
GND  
AO4  
BI1  
• Latch-Up Free Under Any Conditions  
10  
o
o
e-  
e
er)  
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55 C to +125 C  
• Significant Power Reduction Compared to ALSTTL Logic  
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V  
20 PIN CERAMIC FLATPACK  
MIL-STD-1835 DESIGNATOR CDFP4-F20,  
LEAD FINISH C  
• Input Logic Levels  
- VIL = 0.8V Max  
hor  
TOP VIEW  
- VIH = VCC/2 Min  
-
ds  
r-  
• Input Current 1µA at VOL, VOH  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
AE  
AI1  
VCC  
BE  
• Fast Propagation Delay. . . . . . . . . . . . . . . 14.5ns (Max), 10ns (Typ)  
BO4  
AI2  
AO1  
BI4  
Description  
BO3  
AI3  
AO2  
BI3  
po-  
n,  
i-  
The Intersil ACTS244MS is a Radiation Hardened Octal Non-Inverting  
Three-State Buffer having two active low enable inputs.  
BO2  
AI4  
AO3  
BI2  
The ACTS244MS utilizes advanced CMOS/SOS technology to achieve  
high-speed operation. This device is a member of radiation hardened,  
high-speed, CMOS/SOS Logic Family.  
BO1  
GND  
AO4  
BI1  
or,  
ia-  
The ACTS244MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or  
a Dual-In-Line Ceramic Package (D suffix).  
d-  
,
Ordering Information  
PART NUMBER  
5962F9671801VRC  
5962F9671801VXC  
ACTS244D/Sample  
ACTS244K/Sample  
ACTS244HMSR  
TEMPERATURE RANGE  
-55oC to +125oC  
-55oC to +125oC  
25oC  
SCREENING LEVEL  
MIL-PRF-38535 Class V  
MIL-PRF-38535 Class V  
Sample  
PACKAGE  
20 Lead SBDIP  
d,  
L,  
20 Lead Ceramic Flatpack  
20 Lead SBDIP  
25oC  
Sample  
20 Lead Ceramic Flatpack  
Die  
25oC  
Die  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518784  
File Number 3187.1  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
1

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