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ACS521MS PDF预览

ACS521MS

更新时间: 2024-11-11 22:38:59
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
3页 108K
描述
Radiation Hardened 8-Bit Magnitude Comparator

ACS521MS 数据手册

 浏览型号ACS521MS的Datasheet PDF文件第2页浏览型号ACS521MS的Datasheet PDF文件第3页 
ACS521MS  
Radiation Hardened  
8-Bit Magnitude Comparator  
January 1996  
Features  
Pinouts  
• Devices QML Qualified in Accordance with MIL-PRF-38535  
20 PIN CERAMIC DUAL-IN-LINE  
MIL-STD-1835 DESIGNATOR CDIP2-T20,  
LEAD FINISH C  
• Detailed Electrical and Screening Requirements are Contained in  
SMD# 5962-96709 and Intersil’ QM Plan  
TOP VIEW  
• 1.25 Micron Radiation Hardened SOS CMOS  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
GB  
A0  
VCC  
YB  
B7  
A7  
B6  
A6  
B5  
A5  
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)  
• Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day  
(Typ)  
B0  
3
A1  
4
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg  
• Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse  
• Dose Rate Survivability. . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse  
• Latch-Up Free Under Any Conditions  
B1  
5
6
A2  
7
B2  
8
A3  
9
B3  
B4  
A4  
10  
GND  
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC  
• Significant Power Reduction Compared to ALSTTL Logic  
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V  
20 PIN CERAMIC FLATPACK  
MIL-STD-1835 DESIGNATOR CDFP4-F20,  
LEAD FINISH C  
• Input Logic Levels  
- VIL = 30% of VCC Max  
- VIH = 70% of VCC Min  
TOP VIEW  
VCC  
YB  
B7  
A7  
B6  
A6  
B5  
A5  
GB  
A0  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
• Input Current 1µA at VOL, VOH  
B0  
• Fast Propagation Delay . . . . . . . . . . . . . . . . 15ns (Max), 10ns (Typ)  
A1  
B1  
Description  
A2  
The Intersil ACS521MS is a Radiation Hardened 8 bit magnitude com-  
parator device. It provides a low output YB when Word A equals word B  
and input GB is low. All other input states cause a high output.  
B2  
A3  
B3  
B4  
A4  
GND  
The ACS521MS utilizes advanced CMOS/SOS technology to achieve  
high-speed operation. This device is a member of radiation hardened,  
high-speed, CMOS/SOS Logic Family.  
The ACS521MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or a  
Ceramic Dual-In-Line Package (D suffix).  
Ordering Information  
PART NUMBER  
5962F9670901VRC  
5962F9670901VXC  
ACS521D/Sample  
ACS521K/Sample  
ACS521HMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
MIL-PRF-38535 Class V  
MIL-PRF-38535 Class V  
Sample  
PACKAGE  
o
o
-55 C to +125 C  
20 Lead SBDIP  
o
o
-55 C to +125 C  
20 Lead Ceramic Flatpack  
20 Lead SBDIP  
o
25 C  
o
25 C  
Sample  
20 Lead Ceramic Flatpack  
Die  
o
25 C  
Die  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518821  
File Number 3111.1  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
1

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