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AC104XKQM

更新时间: 2024-11-06 01:12:55
品牌 Logo 应用领域
博通 - BOARDCOM 局域网(LAN)标准以太网:16GBASE-T电信电信集成电路
页数 文件大小 规格书
50页 543K
描述
2.5V 4-Port 10/100-TX Ethernet Transceiver

AC104XKQM 技术参数

生命周期:Active包装说明:PQFP-100
Reach Compliance Code:compliant风险等级:5.66
JESD-30 代码:R-PQFP-G100长度:20 mm
功能数量:1端子数量:100
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装形状:RECTANGULAR封装形式:FLATPACK
座面最大高度:3.4 mm标称供电电压:2.5 V
表面贴装:YES技术:CMOS
电信集成电路类型:ETHERNET TRANSCEIVER温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD宽度:14 mm
Base Number Matches:1

AC104XKQM 数据手册

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PRELIMINARY DATA SHEET  
AC104X  
2.5V 4-Port 10/100-TX Ethernet Transceiver  
G E N E R A L D E S C R I P T I O N  
F E A T U R E S  
The AC104X is a highly integrated, 2.5V, low power, four  
port, 10BASE-T/100BASE-TX, Ethernet transceiver  
implemented in 0.25mm CMOS technology. Multiple  
modes of operation, including normal operation, test mode  
and power saving mode, are available through either  
hardware or software control.  
4 ports with RMII MAC interface  
4 ports with 10/100 TX media interface  
• Full-Duplex or Half-Duplex  
Very small package  
• 100PQFP  
Very low power - TYP < 280mW / port  
• Cable Detect mode - TYP < 40 mW / port  
Features include ENDECs, Scrambler/Descrambler, and  
Auto-Negotiation (ANeg) with support for parallel  
detection. The transmitter includes a dual-speed clock  
synthesizer that only needs one external clock source. The  
chip has built-in wave shaping driver circuit for both  
10Mbps and 100Mbps, eliminating the need for an external  
hybrid filter. The receiver has an adaptive equalizer / DC  
restoration circuit for accurate clock / data recovery for the  
100BASE-TX signal. It also provides an on-chip low pass  
filer / Squelch circuit for the 10BASE-T signal.  
• Power Down mode - TYP < 3.3 mW / port  
2.5V .25 micron CMOS  
RMII 3.3V tolerant I/O  
Fully compliant with  
• IEEE 802.3 / 802.3u  
• RMII  
Baseline Wander Compensation  
Multi-Function LED outputs  
Cable length indicator  
Reverse polarity detection and correction with Regis-  
ter Bit indication - Automatic or Forced  
HP Auto-MDIX  
8 programmable interrupts  
Port A  
Port B  
TXOP/N(A)  
RXIP/N(A)  
Port C  
Port D  
TXOP/N(B)  
100TX  
PCS  
PMA  
TP_PMD  
.MLT-3  
.BLW  
.Stream Cipher  
RXIP/N(B)  
.Framer  
.Carrier Detect  
.4B/5B  
.Clock Recov.  
.Link Monitor  
.Signal Detect  
TXOP/N(C)  
RXIP/N(C)  
RMII  
100RX  
Mux  
25  
MHz  
TXOP/N(D)  
RXIP/N(D)  
10TX  
10RX  
10BASE-T  
MDIO/MDC  
Control/Status  
20  
MHz  
RX  
FLP  
MII Serial Management  
Interface and Registers  
PLL Clk Gen.  
Test/LED Control  
Auto-  
Negotiation  
25  
MHz  
PHYAD[4:0]  
CKIN TEST[3:0] LED Drivers  
Figure 1: Functional Block Diagram  
AC104X-DS00-405-R  
12/11/01  
16215 Alton Parkway P.O. Box 57013 Irvine, CA 92619-7013 • Phone: 949-450-8700 • Fax: 949-450-8710  

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