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AC104Z PDF预览

AC104Z

更新时间: 2024-11-06 01:21:51
品牌 Logo 应用领域
博通 - BOARDCOM 局域网(LAN)标准
页数 文件大小 规格书
66页 739K
描述
Ultra Low Power 10/100 Quad SMII/RMII Ethernet Transceiver

AC104Z 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:compliant风险等级:5.89
Base Number Matches:1

AC104Z 数据手册

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DATA SHEET  
AC104Z  
Ultra Low Power 10/100 Quad SMII/RMII Ethernet  
Transceiver  
GENERAL DESCRIPTION  
FEATURES  
4 ports with RMII MAC interface  
The AC104Z is a highly integrated, 3.3V, low-power, four-  
port, 10BASE-T/100BASE-TX, Ethernet transceiver  
implemented in 0.35µm CMOS technology. Multiple modes  
of operation, including normal operation, test mode and  
power-saving mode, are available through either hardware  
or software control.  
4 ports with 10/100 TX media interface  
Full-duplex or half-duplex  
FEFI on 100FX  
Very small package  
128PQFP  
Very low power – TYP < 280 mW per port  
Cable detect mode – TYP < 40 mW per port  
Power Down mode – TYP < 3.3 mW per port  
Features include MAC interfaces, ENDECs, Scrambler/  
Descrambler, and Auto-Negotiation (ANeg) with support  
for parallel detection. The transmitter includes a dual-  
speed clock synthesizer that only needs one external clock  
source. The chip has built-in, wave shaping driver circuit for  
both 10 Mbps and 100 Mbps, thereby eliminating the need  
for an external hybrid filter. The receiver has an adaptive  
equalizer/DC restoration circuit for accurate clock/data  
recovery for the 100BASE-TX signal. The receiver also  
provides an on-chip low pass filer/Squelch circuit for the  
10BASE-T signal.  
Selectable TX drivers for 1:1 or 1.25:1 transformers for  
additional power reduction  
3.3V.35 micron CMOS  
(S/R) MII SV tolerant  
Fully compliant with  
IEEE 802.3 / 802.3u  
SMII/RMII  
UNH test labs  
Baseline wander compensation  
Multi-function LED outputs  
Cable length indicator  
MAC interfaces support four ports of 10/100 RMII and  
SMII. Media interfaces support four ports of 10/100TX/FX.  
Reverse polarity detection and correction with register bit  
indication – automatic or forced  
8 programmable interrupts  
Port 0  
Port 1  
RXIP/N-TXOP/N(0)  
FXRP/N-FXTP/N(0)  
Port 2  
Port 3  
RXIP/N-TXOP/N(1)  
100TX  
PCS  
PMA  
TP_PMD  
.MLT-3  
.BLW  
FXRP/N-FXTP/N(1)  
.Framer  
.Carrier Detect  
.4B/5B  
.Clock Recov.  
.Link Monitor  
.Signal Detect  
RXIP/N-TXOP/N(2)  
FXRP/N-FXTP/N(2)  
.Stream Cipher  
SMII/RMII  
100RX  
Mux  
25  
MHs  
RXIP/N-TXOP/N(3)  
FXRP/N-FXTP/N(3)  
10TX  
10RX  
10BASE-T  
Control/Status  
20  
RX  
FLP  
MHs  
MII Serial Management  
Interface and Registers  
PLL Clk Gen.  
Test/LED Control  
Auto-  
Negotiation  
MII SMI  
25  
MHs  
PHYAD[4:0]  
XTLP/N CKIN TEST[3:0] LED Drivers  
Figure 1: Functional Block Diagram  
AC104Z-DS03-405-R  
9/9/02  
16215 Alton Parkway P.O. Box 57013 • Irvine, CA 92619-7013 • Phone: 949-450-8700 • Fax: 949-450-8710  

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