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A3918 PDF预览

A3918

更新时间: 2024-01-29 07:31:52
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器
页数 文件大小 规格书
8页 226K
描述
Low Voltage DC Motor Driver

A3918 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN,
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:1.71模拟集成电路 - 其他类型:BRUSH DC MOTOR CONTROLLER
JESD-30 代码:S-XQCC-N16JESD-609代码:e3
长度:3 mm湿度敏感等级:1
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-20 °C
最大输出电流:1.5 A封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
座面最大高度:0.8 mm最大供电电压 (Vsup):9 V
最小供电电压 (Vsup):2.5 V标称供电电压 (Vsup):3 V
表面贴装:YES温度等级:OTHER
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:3 mm
Base Number Matches:1

A3918 数据手册

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Low Voltage DC Motor Driver  
A3918  
Selection Guide  
Part Number  
Packing  
Package  
A3918SESTR-T  
1500 pieces per 7-in. reel  
16-pin QFN with exposed thermal pad  
Absolute Maximum Ratings  
Characteristic  
Symbol  
VBB  
Notes  
Rating  
9.6  
Units  
Load Supply Voltage  
V
V
V
V
Logic Input Voltage Range  
VIN  
–0.3 to 7  
0.5  
Continuous  
Sense Voltage  
Output Current  
VSENSE  
Pulsed, tw < 1 μs  
1
May be limited by duty cycle, ambient  
temperature, and heat sinking. Under  
any set of conditions, do not exceed  
the specified current rating or a junction  
temperature of 150°C.  
Continuous  
1
A
A
IOUT  
Peak, DC < 30%  
1.5  
Operating Temperature Range  
Junction Temperature  
TA  
TJ(max)  
Tstg  
Range S  
–20 to 85  
150  
°C  
°C  
°C  
Storage Temperature Range  
–40 to 150  
Thermal Characteristics may require derating at maximum conditions, see application information  
Characteristic  
Symbol  
Test Conditions*  
Value Units  
Package Thermal Resistance  
RθJA  
4-layer PCB based on JEDEC standard  
42  
ºC/W  
*Additional thermal information available on the Allegro website.  
Terminal List Table  
Name  
Number  
Function  
Pin-out Diagram  
15  
1
Charge pump capacitor terminal 1  
Charge pump capacitor terminal 2  
Charge pump capacitor terminal 3  
Charge pump capacitor terminal 4  
Current limit flag  
CP1  
CP2  
14  
16  
7
CP3  
CP4  
FL  
1
2
3
4
12  
11  
10  
9
CP2  
GND  
OUTA  
SENSE  
OUTB  
VBB  
2, 6, 8  
4
Ground  
GND  
IN1  
Control input 1  
PAD  
SLEEP  
IN1  
5
Control input 2  
IN2  
12  
10  
DMOS full-bridge output A  
DMOS full-bridge output B  
Exposed thermal pad  
OUTA  
OUTB  
PAD  
SENSE  
11  
3
Current sense resistor terminal  
Sleep logic input, active low  
Supply Voltage  
¯¯¯¯¯¯¯¯¯¯  
SLEEP  
9
VBB  
VCP  
13  
Reservoir capacitor terminal  
Allegro MicroSystems, Inc.  
115 Northeast Cutoff  
2
Worcester, Massachusetts 01615-0036 U.S.A.  
1.508.853.5000; www.allegromicro.com  

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