Datasheet > A3924KLVTR-T

A3924KLVTR-T

更新时间： 2024-09-17 14:47:31

品牌	Logo	应用领域
急速微 - ALLEGRO		驱动接口集成电路
页数	文件大小	规格书
57页	773K
描述
Full Bridge Based MOSFET Driver,

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中文翻译

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技术参数
数据手册

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A3924KLVTR-T 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	包装说明：	,
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	1.75
接口集成电路类型：	FULL BRIDGE BASED MOSFET DRIVER	JESD-609代码：	e3
峰值回流温度（摄氏度）：	NOT SPECIFIED	端子面层：	Matte Tin (Sn)
处于峰值回流温度下的最长时间：	NOT SPECIFIED	Base Number Matches：	1

A3924KLVTR-T 数据手册

A3924

Automotive Full-Bridge MOSFET Driver

FEATURES AND BENEFITS

• Full-bridge MOSFET driver

DESCRIPTION

TheA3924 is an N-channel power MOSFET driver capable of

• Bootstrap gate drive for N-channel MOSFET bridge

• Cross-conduction protection with adjustable dead time

• Charge pump for low supply voltage operation

• Programmable gate drive voltage

controlling MOSFETs connected in a full-bridge (H-bridge)

arrangement and is specifically designed for automotive

applications with high-power inductive loads, such as brush

DC motors solenoids and actuators.

• 5.5 to 50 V supply voltage operating range

• Integrated logic supply

• Two integrated current sense amplifiers

• SPI-compatible serial interface

• Bridge control by direct logic inputs or serial interface

• TTL-compatible logic inputs

A unique charge pump regulator provides the programmable

gate drive voltage for battery voltages down to 7 V and allows

the A3924 to operate with a reduced gate drive, down to

5.5V.Abootstrapcapacitorisusedtoprovidetheabove-battery

supply voltage required for N-channel MOSFETs.

• Open-load detection

• Extensive programmable diagnostics

• Diagnostic verification

• Safety-assist features

The full bridge can be controlled by independent logic level

inputs or through the SPI-compatible serial interface. The

external power MOSFETs are protected from shoot-through

by programmable dead time.

Integrated diagnostics provide indication of multiple internal

faults, system faults, and power bridge faults, and can be

configured to protect the power MOSFETs under most short-

circuit conditions. For safety-critical systems, the integrated

diagnostic operation can be verified under control of the serial

interface.

PACKAGES:

38-Pin eTSSOP

(suffix LV)

40-Terminal eQFN

(suffix EV)

In addition to providing full access to the bridge control, the

serialinterfaceisalsousedtoalterprogrammablesettingssuch

as dead time, VDS threshold, and fault blank time. Detailed

diagnosticinformationcanbereadthroughtheserialinterface.

The A3924 is supplied in a 38-pin eTSSOP (suffix ‘LV’) and

a 40-terminal eQFN package (suffix ‘EV’). Both packages are

lead (Pb) free with 100% matte-tin leadframe plating.

Not to scale

VBAT

A3924

ECU

SPI

GND

Typical Application – Functional Block Diagram

March 29, 2017

A3924-DS, Rev. 2

12 3 4 5 6 7...57

中文翻译

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