A29L004A Series
Sector Protection/Unprotection
Temporary Sector Unprotect (N/A on 32-pin PLCC
& (s)TSOP packages)
The hardware sector protection feature disables both
program and erase operations in any sector. The hardware
sector unprotection feature re-enables both program and
erase operations in previously protected sectors.
It is possible to determine whether a sector is protected or
unprotected. See “Autoselect Mode” for details.
This feature allows temporary unprotection of previous
protected sectors to change data in-system. The Sector
Unprotect mode is activated by setting the
pin to VID.
RESET
During this mode, formerly protected sectors can be
programmed or erased by selecting the sector addresses.
Sector protection / unprotection can be implemented via two
methods. The primary method requires VID on the
Once VID is removed from the
pin, all the previously
RESET
protected sectors are protected again. Figure 1 shows the
algorithm, and the Temporary Sector Unprotect diagram
shows the timing waveforms, for this feature.
pin only (N/A on 32-pin PLCC & (s)TSOP packages),
RESET
and can be implemented either in-system or via
programming equipment. Figure 2 shows the algorithm and
the Sector Protect / Unprotect Timing Diagram illustrates the
timing waveforms for this feature. This method uses standard
microprocessor bus cycle timing. For sector unprotect, all
unprotected sectors must first be protected prior to the first
sector unprotect write cycle. The alternate method must be
implemented using programming equipment. The procedure
requires a high voltage (VID) on address pin A9 and the
control pins.
START
RESET = VID
(Note 1)
The device is shipped with all sectors unprotected.
It is possible to determine whether a sector is protected or
unprotected. See "Autoselect Mode" for details.
Hardware Data Protection
Perform Erase or
Program Operations
The requirement of command unlocking sequence for
programming or erasing provides data protection against
inadvertent writes (refer to the Command Definitions table).
In addition, the following hardware data protection measures
prevent accidental erasure or programming, which might
otherwise be caused by spurious system level signals during
VCC power-up transitions, or from system noise. The device
is powered up to read array data to avoid accidentally writing
data to the array.
RESET = VIH
Write Pulse "Glitch" Protection
Temporary Sector
Unprotect
Completed (Note 2)
Noise pulses of less than 5ns (typical) on
do not initiate a write cycle.
,
or
WE
OE CE
Logical Inhibit
Notes:
Write cycles are inhibited by holding any one of
=VIL,
OE
CE
1. All protected sectors unprotected.
2. All previously protected sectors are protected once again.
= VIH or
= VIH. To initiate a write cycle,
and
WE
CE
must be a logical zero while
is a logical one.
WE
OE
Figure 1. Temporary Sector Unprotect Operation
Power-Up Write Inhibit
If
=
= VIL and
= VIH during power up, the
OE
WE
device does not accept commands on the rising edge of
. The internal state machine is automatically reset to
CE
WE
reading array data on the initial power-up.
PRELIMINARY (March, 2005, Version 0.0)
8
AMIC Technology, Corp.