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9ZXL0831EKILF PDF预览

9ZXL0831EKILF

更新时间: 2022-02-26 09:48:38
品牌 Logo 应用领域
艾迪悌 - IDT PC
页数 文件大小 规格书
18页 273K
描述
8-Output DB800ZL for PCIe Gen1–4 and QPI/UPI

9ZXL0831EKILF 数据手册

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9ZXL0831E / 9ZXL0851E Datasheet  
Absolute Maximum Ratings  
Stresses above the ratings listed below can cause permanent damage to the 9ZXL0831E / 9ZXL0851E. These ratings, which are standard  
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above  
those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended  
periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.  
Parameter  
Supply Voltage  
Input Low Voltage  
Symbol  
VDDx  
VIL  
Conditions  
Minimum  
Typical Maximum Units Notes  
3.9  
V
V
1,2  
1
GND-0.5  
Input High Voltage  
Input High Voltage  
VIH  
Except for SMBus interface  
SMBus clock and data pins  
VDD+0.5  
V
V
1,3  
1
VIHSMB  
3.9  
150  
125  
Storage Temperature  
Junction Temperature  
Input ESD Protection  
Ts  
Tj  
ESD prot  
-65  
°C  
°C  
V
1
1
1
Human Body Model  
2500  
1 Guaranteed by design and characterization, not 100% tested in production.  
2 Operation under these conditions is neither implied nor guaranteed.  
3 Not to exceed 3.9V.  
Electrical CharacteristicsDIF_IN Clock Input Parameters  
TAMB = over the specified operating range. Supply voltages per normal operation conditions; see Test Loads for loading conditions  
Parameter  
Symbol  
Conditions  
Minimum  
Typical Maximum Units Notes  
Input Crossover Voltage - DIF_IN VCROSS  
Cross over voltage  
150  
900  
mV  
1
Input Swing - DIF_IN  
Input Slew Rate - DIF_IN  
Input Leakage Current  
Input Duty Cycle  
VSWING  
dv/dt  
IIN  
Differential value  
Measured differentially  
300  
0.4  
-5  
mV  
V/ns  
μA  
1
8
5
1,2  
VIN = VDD , VIN = GND  
dtin  
Measurement from differential waveform  
45  
0
55  
125  
%
1
1
Input Jitter - Cycle to Cycle  
JDIFIn  
Differential measurement  
ps  
1 Guaranteed by design and characterization, not 100% tested in production.  
2Slew rate measured through +/-75mV window centered around differential zero  
Electrical CharacteristicsSMBus  
TAMB = over the specified operating range. Supply voltages per normal operation conditions; see Test Loads for loading conditions  
Parameter  
Symbol  
VILSMB  
VIHSMB  
VOLSMB  
IPULLUP  
VDDSMB  
tRSMB  
Conditions  
Minimum  
Typical Maximum Units Notes  
SMBus Input Low Voltage  
SMBus Input High Voltage  
SMBus Output Low Voltage  
SMBus Sink Current  
0.8  
VDDSMB  
0.4  
V
V
2.1  
at IPULLUP  
at VOL  
V
4
mA  
V
Nominal Bus Voltage  
2.7  
3.6  
1000  
300  
1
1
1
5
SCLK/SDATA Rise Time  
SCLK/SDATA Fall Time  
SMBus Operating Frequency  
(Max VIL - 0.15V) to (Min VIH + 0.15V)  
(Min VIH + 0.15V) to (Max VIL - 0.15V)  
Maximum SMBus operating frequency  
ns  
ns  
kHz  
tFSMB  
fMAXSMB  
500  
1 Guaranteed by design and characterization, not 100% tested in production.  
2 Control input must be monotonic from 20% to 80% of input swing.  
3 Time from deassertion until outputs are > 200mV.  
4 DIF_IN input.  
5 The differential input clock must be running for the SMBus to be active.  
©2018 Integrated Device Technology, Inc  
5
August 14, 2018  

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