Datasheet > 9ZXL0631EKILFT

9ZXL0631EKILFT

更新时间： 2022-02-26 10:53:48

品牌	Logo	应用领域
艾迪悌 - IDT		PC
页数	文件大小	规格书
20页	303K
描述
6-Output DB800ZL Derivative for PCIe Gen1â4 and UPI

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数据手册

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9ZXL0631EKILFT 数据手册

9ZXL0631E / 9ZXL0651E Datasheet

Pin Assignments

40 39 38 37 36 35 34 33 32 31

VDDA

30 NC

^HIBW_BYPM_LOBW#

^CKPWRGD_PD#

GND

29 VDD

28 vOE3#

27 DIF3#

26 DIF3

25 VDD

24 DIF2#

23 DIF2

22 vOE2#

21 VDD

9ZXL0631

9ZXL0651

pin 41 is EPAD,

connect to GND

VDDR

DIF_IN

DIF_IN#

SMBDAT

SMBCLK

FBOUT_NC# 10

11 12 13 14 15 16 17 18 19 20

40-QFN, 5 × 5 mm, 0.4mm pitch

^ prefix indicates internal pull-up resistor

v prefix indicates Internal pull-dow n resistor

Pow er Management

CKPWRGD_PD#

DIF_IN

SMBus EN bit

OE[x]#

DIF[x]

PLL State (if not in Bypass Mode)

Low/Low

Running

Low/Low

OFF

Running

PLL Operating Mode

Pow er Connections

HIBW_BYPM_LOBW#

Mode

Pin Number

Low

Mid

PLL Low BW

Bypass

GND

Description

Analog PLL

Analog input

DIF clocks

High

PLL High BW

Note: PLL is OFF in Bypass Mode.

12,16,20,21,25,29,31,35,39

SMBus Addressing

PLL Operating Mode Readback

Address

+ Read/Write Bit

HIBW_BYPM_LOBW#

Byte 0, bit 7

Byte 0, bit 6

1101100

Low (Low BW)

Mid (Bypass)

High (High BW)

August 14, 2018

1 234 5 6 7...20

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