Datasheet > 9FGU0631CKILFT

9FGU0631CKILFT

更新时间： 2022-02-26 10:49:52

品牌	Logo	应用领域
艾迪悌 - IDT		PC
页数	文件大小	规格书
15页	202K
描述
6-O/P 1.5V PCIe Gen 1-2-3 Clock Generator

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中文翻译

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数据手册

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9FGU0631CKILFT 数据手册

9FGU0631 DATASHEET

Pin Configuration

40 39 38 37 36 35 34 33 32 31

vSS_EN_tri

XIN/CLKIN_25

vOE3#

DIF3#

DIF3

VDDXTAL1.5

VDDREF1.5

vSADR/REF1.5

VDDIO

VDDA1.5

9FGU0631

Paddle is GND

vOE2#

DIF2#

DIF2

GNDDIG

SCLK_3.3

SDATA_3.3

vOE1#

11 12 13 14 15 16 17 18 19 20

40-pin VFQFPN, 5x5 mm, 0.4mm pitch

prefix indicates internal 120KOhm pull down resistor

prefix indicates internal 120KOhm pull up resistor

SMBus Address Selection Table

Read/Write Bit

SADR

Address

1101000

1101010

State of SADR on first application

of CKPWRGD_PD#

Power Management Table

SMBus

CKPWRGD_PD#

OE bit

DIFx

True O/P

Low

REF

OEx#

Comp. O/P

Low

Hi-Z¹

Running

Low

Running

Low

Running

Low

1. REF is Hi-Z until the 1st assertion of CKPWRGD_PD# high. After this, when

CKPWRG_PD# is low, REF is Low.

Power Connections

Pin Number

Description

VDD

VDDIO

GND

XTAL OSC

REF Power

Digital (dirty)

Power

12,17,27,32,39

DIF outputs

PLL Analog

6-O/P 1.5V PCIE GEN 1-2-3 CLOCK GENERATOR

OCTOBER 18, 2016

123 4 5 6 7...15

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