9FGP202A
FREQUENCY TIMING GENERATOR FOR PERIPHERALS
SMBus Table: CPU Frequency Select and Spread Spectrum Control Register
Pin #
Byte 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Reserved
Reserved
Control Function
Reserved
Type
RW
Rev 0.20
RW
RW
RW
RW
RW
RW
0
1
PWD
-
-
-
-
-
-
-
-
Reserved
Reserved
Reserved
0
0
0
0
0
0
1
0
Reserved
Reserved
Reserved
DOT96 SS_EN
CPU SS_EN
CPU FS2
CPU FS1
CPU FS0
DOT96 Spread Spectrum Enable
CPU Spread Spectrum Enable
CPU Freq Select Bit 2
CPU Freq Select Bit 1
CPU Freq Select Bit 0
Disable
Enable
See Table 1:
CPU Frequency Selection Table
SMBus Table: RMII Output Control Register
Byte 1
Pin #
Name
Control Function
Type
0
1
PWD
24
RMII_7 Enable
RMII_7 Output Control
RW
Disable
Enable
1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
25
28
29
32
33
36
37
RMII_6 Enable
RMII_5 Enable
RMII_4 Enable
RMII_3 Enable
RMII_2 Enable
RMII_1 Enable
RMII_0 Enable
RMII_6 Output Control
RMII_5 Output Control
RMII_4 Output Control
RMII_3 Output Control
RMII_2 Output Control
RMII_1 Output Control
RMII_0 Output Control
RW
RW
RW
RW
RW
RW
RW
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
1
1
1
1
1
1
1
SMBus Table: DOT, CPU, 32.768KHz, 25MHz and 33.33MHz Outputs Control Register
Pin #
7,8
Byte 2
Bit 7
Name
Control Function
Driven in PD
Type
RW
0
1
Hi-Z
PWD
0
CPUCLK PD Drive Mode
Driven
3,4
DOT96SS PD Drive Mode
Driven in PD
RW
Driven
Hi-Z
0
Bit 6
22
17
16
13
6
33.33MHz Enable
25MHz_1 Enable
25MHz_0 Enable
32.768kHz Enable
CPUCLK Enable
DOT96SS Enable
33.33MHz Output Control
25MHz_1 Output Control
25MHz_0 Output Control
32.768KHz Output Control
CPUCLK Output Control
DOT96SS Output Control
RW
RW
RW
RW
RW
RW
Disable
Disable
Disable
Disable
Disable
Disable
Enable
Enable
Enable
Enable
Enable
Enable
1
1
1
1
1
1
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
5
SMBus Table: DOT96 Frequency Select and Spread Spectrum Control Register
Pin #
Byte 3
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Name
Reserved
Reserved
Reserved
Control Function
Reserved
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
PWD
-
-
-
-
-
-
-
-
Reserved
Reserved
Reserved
Reserved
0
0
0
0
0
0
0
0
Reserved
Reserved
Reserved
Reserved
DOT96SS FS3
DOT96SS FS2
DOT96SS FS1
DOT96SS FS0
DOT96 Freq Select Bit 3
DOT96 Freq Select Bit 2
DOT96 Freq Select Bit 1
DOT96 Freq Select Bit 0
See Table 2:
DOT Frequency Selection Table
Bit 0
SMBus Table: RMII Strength Control Register
Pin #
Byte 4
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Control Function
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
PWD
24
25
28
29
32
33
36
37
RMII_7 Str
RMII_6 Str
RMII_5 Str
RMII_4 Str
RMII_3 Str
RMII_2 Str
RMII_1 Str
RMII_0 Str
RMII_7 Strength Control
RMII_6 Strength Control
RMII_5 Strength Control
RMII_4 Strength Control
RMII_3 Strength Control
RMII_2 Strength Control
RMII_1 Strength Control
RMII_0 Strength Control
1-Load (1X)
1-Load (1X)
1-Load (1X)
1-Load (1X)
1-Load (1X)
1-Load (1X)
1-Load (1X)
1-Load (1X)
2-Loads (2X)
2-Loads (2X)
2-Loads (2X)
2-Loads (2X)
2-Loads (2X)
2-Loads (2X)
2-Loads (2X)
2-Loads (2X)
0
0
0
0
0
0
0
0
SMBus Table: 32.768KHz, 25Mhz and 33.33MHz Strength Control Register
Byte 5
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
-
-
22
17
16
13
-
Name
Reserved
Reserved
33.33MHz Str
25MHz_1 Str
25MHz_0 Str
32.768kHz Str
Reserved
Control Function
Reserved
Type
RW
RW
RW
RW
RW
RW
RW
RW
0
1
PWD
Reserved
Reserved
1-Load (1X)
1-Load (1X)
1-Load (1X)
1-Load (1X)
Reserved
Reserved
0
0
1
1
1
1
0
0
Reserved
33.33MHz Strength Control
25MHz_1 Strength Control
25MHz_1 Strength Control
32.768kHz Strength Control
Reserved
2-Loads (2X)
2-Loads (2X)
2-Loads (2X)
2-Loads (2X)
-
Reserved
Reserved
IDT® FREQUENCY TIMING GENERATOR FOR PERIPHERALS
13
9FGP202A
REV D 070511