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9DB423BFLFT PDF预览

9DB423BFLFT

更新时间: 2024-02-17 19:18:05
品牌 Logo 应用领域
艾迪悌 - IDT 时钟驱动器逻辑集成电路光电二极管PC
页数 文件大小 规格书
19页 282K
描述
Four Output Differential Buffer for PCIe Gen 1, Gen 2 and QPI

9DB423BFLFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP-28针数:28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.82
系列:9DB输入调节:DIFFERENTIAL MUX
JESD-30 代码:R-PDSO-G28JESD-609代码:e3
长度:9.7 mm逻辑集成电路类型:PLL BASED CLOCK DRIVER
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:28
实输出次数:4最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP28,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.05 ns座面最大高度:1.2 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

9DB423BFLFT 数据手册

 浏览型号9DB423BFLFT的Datasheet PDF文件第5页浏览型号9DB423BFLFT的Datasheet PDF文件第6页浏览型号9DB423BFLFT的Datasheet PDF文件第7页浏览型号9DB423BFLFT的Datasheet PDF文件第9页浏览型号9DB423BFLFT的Datasheet PDF文件第10页浏览型号9DB423BFLFT的Datasheet PDF文件第11页 
9DB423B  
Four Output Differential Buffer for PCIe for Gen 1, Gen 2 and QPI  
Clock Periods Differential Outputs with Spread Spectrum Enabled  
Measurement  
Window  
Symbol  
1 Clock  
Lg-  
1us  
-SSC  
0.1s  
-ppm error  
0.1s  
0ppm  
0.1s  
+ ppm error  
1us  
+SSC  
1 Clock  
Lg+  
Absolute Short-term Long-Term  
Period Average Average  
Long-Term Short-term  
Average Average  
Period  
Period  
Definition  
Minimum Minimum Minimum  
Absolute Absolute Absolute  
Nominal Maximum Maximum Maximum  
Period  
9.949  
7.449  
5.949  
4.950  
3.700  
2.950  
2.450  
Period  
9.999  
7.499  
5.999  
5.000  
3.750  
3.000  
2.500  
Period  
10.024  
7.518  
6.014  
5.012  
3.759  
3.007  
2.506  
Units Notes  
ns 1,2,3  
ns 1,2,4  
ns 1,2,5  
ns 1,2,5  
ns 1,2,5  
ns 1,2,5  
ns 1,2,5  
10.025  
7.519  
6.015  
5.013  
3.759  
3.008  
2.506  
10.026  
7.520  
6.016  
5.013  
3.760  
3.008  
2.507  
10.051  
7.538  
6.031  
5.026  
3.769  
3.015  
2.513  
10.101  
7.588  
6.081  
5.076  
3.819  
3.065  
2.563  
DIF 100  
DIF 133  
DIF 166  
DIF 200  
DIF 266  
DIF 333  
DIF 400  
Clock Periods Differential Outputs with Spread Spectrum Disabled  
Measurement  
Window  
Symbol  
1 Clock  
Lg-  
1us  
-SSC  
0.1s  
-ppm error  
0.1s  
0ppm  
0.1s  
+ ppm error  
1us  
+SSC  
1 Clock  
Lg+  
Absolute Short-term Long-Term  
Period Average Average  
Long-Term Short-term  
Average Average  
Period  
Period  
Definition  
Minimum Minimum Minimum  
Absolute Absolute Absolute  
Nominal Maximum Maximum Maximum  
Period  
9.949  
7.449  
5.949  
4.950  
3.700  
2.950  
2.450  
Period  
Period  
9.999  
7.499  
5.999  
5.000  
3.750  
3.000  
2.500  
Units Notes  
ns 1,2,3  
ns 1,2,4  
ns 1,2,5  
ns 1,2,5  
ns 1,2,5  
ns 1,2,5  
ns 1,2,5  
10.000  
7.500  
6.000  
5.000  
3.750  
3.000  
2.500  
10.001  
7.501  
6.001  
5.001  
3.750  
3.000  
2.500  
10.051  
7.551  
6.051  
5.051  
3.800  
3.050  
2.550  
DIF 100  
DIF 133  
DIF 166  
DIF 200  
DIF 266  
DIF 333  
DIF 400  
1Guaranteed by design and characterization, not 100% tested in production.  
2 All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with CK410B+ accuracy  
requirements. The 9DB423/823 itself does not contribute to ppm error.  
3
Driven by SRC output of main clock, PCIe PLL Mode or Bypass mode  
4
Driven by CPU output of main clock, QPI PLL Mode or Bypass mode  
5
Driven by CPU output of CK410B+/CK420BQ/CK505 main clock,  
Bypass mode only  
IDT® Four Output Differential Buffer for PCIe Gen 1, Gen 2 and QPI  
1437B - 02/04/10  
8

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