Datasheet > 97U877KLF-T

97U877KLF-T

更新时间： 2024-02-17 17:50:00

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
13页	129K
描述
Clock Driver

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技术参数
数据手册

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97U877KLF-T 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	,	Reach Compliance Code：	compliant
风险等级：	5.84	Base Number Matches：	1

97U877KLF-T 数据手册

ICS97U877

Recommended Operating Condition (see note1)

T_A= 0 - 70°C; Supply Voltage AVDD, VDDQ = 1.8 V +/- 0.1V (unless otherwise stated)

SYMBOL

_DDQ, A_VDD

MIN

1.7

TYP

1.8

MAX

1.9

UNITS

PARAMETER

Supply Voltage

CONDITIONS

CLK_INT, CLK_INC, FB_INC,

FB_INT

OE, OS

CLK_INT, CLK_INC, FB_INC,

FB_INT

OE, OS

0.35 x V_DDQ

V_IL

Low level input voltage

High level input voltage

0.65 x V_DDQ

-0.3

V_IH

V_IN

DC input signal voltage (note

_DDQ+ 0.3

DC - CLK_INT, CLK_INC,

FB_INC, FB_INT

AC - CLK_INT, CLK_INC,

V_DDQ+ 0.4

0.3

0.6

Differential input signal

voltage (note 3)

V_ID

FB_INC, FB_INT

Output differential cross-

voltage (note 4)

Input differential cross-

V_OX

V_IX

V_DDQ/2 - 0.10

V_DDQ/2 + 0.10

V_DDQ/2 - 0.15 V_DD/2 V_DDQ2 + 0.15

voltage (note 4)

I_OH

I_OL

High level output current

-9

Low level output current

Operating free-air

temperature

T_A

°C

Notes:

1. Unused inputs must be held high or low to prevent them from floating.

2. DC input signal voltage specifies the allowable DC execution of differential input.

3. Differential inputs signal voltages specifies the differential voltage [VTR-VCP]

required for switching, where VTR is the true input level and VCP is the

complementary input level.

4. Differential cross-point voltage is expected to track variations of V_DDQand is the

voltage at which the differential signal must be crossing.

0792A—04/15/04

1 2 3 456 7 8...13

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