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954141CGLF PDF预览

954141CGLF

更新时间: 2024-11-01 20:57:39
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
19页 137K
描述
Clock Generator, PDSO56

954141CGLF 技术参数

是否Rohs认证: 符合生命周期:Obsolete
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.81
JESD-30 代码:R-PDSO-G56端子数量:56
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源:3.3 V
认证状态:Not Qualified子类别:Clock Generators
最大压摆率:400 mA标称供电电压:3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUALBase Number Matches:1

954141CGLF 数据手册

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954141  
Datasheet  
Programmable Timing Control Hub™ for Next Gen P4™ processor  
Recommended Application:  
Features/Benefits:  
CK410 compliant clock  
Programmable output frequencies  
Programmable output skew.  
Programmable spread percentage for EMI control.  
Programmable watch dog safe frequency.  
Output Features:  
2 - 0.7V current-mode differential CPU pairs  
6 - 0.7V current-mode differential SRC pair  
Supports tight ppm accuracy clocks for Serial-ATA  
1 - 0.7V current-mode differential CPU_ITP/SRC  
selectable pair  
Supports spread spectrum modulation, 0 to -0.5%  
down spread, 0.25% center spread, and 0.3%  
center spread  
6 - PCI (33MHz)  
3 - PCICLK_F, (33MHz) free-running  
1 - USB, 48MHz  
1 - DOT, 96MHz, 0.7V current differential pair  
1 - REF, 14.318MHz  
Uses external 14.318MHz crystal, external crystal load  
caps are required for frequency tuning  
Supports undriven differential CPU, SRC pair in PD#  
for power management.  
Key Specifications:  
CPU/SRC outputs cycle-cycle jitter < 85ps  
PCI outputs cycle-cycle jitter < 250ps  
+/- 300ppm frequency accuracy on CPU & SRC clocks  
Functionality  
Pin Configuration  
Bit2 Bit1 Bit0  
FSLC FSLB FSLA MHz  
CPU  
SRC  
MHz  
SATA  
MHz  
PCI  
MHz  
33.33  
Bit4 Bit3  
1
56  
PCICLK2  
55 PCICLK1  
54 PCICLK0  
VDDPCI  
GND 2  
PCICLK3 3  
266.66 100.00 100.00  
133.33 100.00 100.00  
200.00 100.00 100.00  
166.66 100.00 100.00  
333.33 100.00 100.00  
100.00 100.00 100.00  
400.00 100.00 100.00  
200.00 100.00 100.00  
266.66 133.33 133.33  
133.33 133.33 133.33  
200.00 133.33 133.33  
166.66 125.00 125.00  
333.33 125.00 125.00  
100.00 133.33 133.33  
400.00 133.33 133.33  
200.00 133.33 133.33  
269.33 101.00 101.00  
134.66 101.00 101.00  
202.00 101.00 101.00  
168.33 101.00 101.00  
274.66 103.00 103.00  
137.33 103.00 103.00  
206.00 103.00 103.00  
171.66 103.00 103.00  
279.99 105.00 105.00  
140.00 105.00 105.00  
210.00 105.00 105.00  
174.99 105.00 105.00  
287.99 108.00 108.00  
144.00 108.00 108.00  
216.00 108.00 108.00  
179.99 108.00 108.00  
0
0
0
0
0
0
0
0
0
0
0
1
0
1
0
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.33  
33.67  
33.67  
33.67  
33.67  
34.33  
34.33  
34.33  
34.33  
35.00  
35.00  
35.00  
35.00  
36.00  
36.00  
36.00  
36.00  
4
5
6
7
8
9
53  
52  
51  
50  
49  
48  
PCICLK4  
PCICLK5  
FSLC  
REFOUT  
0
0
0
0
0
1
1
0
1
0
GND  
VDDPCI  
ITP_EN/PCICLK_F0  
PCICLK_F1  
GND  
X1  
X2  
0
0
0
0
1
1
0
1
1
0
VDDREF  
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
PCICLK_F2 10  
VDD48 11  
47 SDATA  
46 SCLK  
12  
13  
14  
15  
16  
45  
44  
43  
42  
41  
USB_48MHz  
GND  
GND  
CPUCLKT0  
CPUCLKC0  
VDDCPU  
CPUCLKT1  
DOTT_96MHz  
DOTC_96MHz  
FSLB  
Vtt_PwrGd#/PD 17  
40 CPUCLKC1  
18  
19  
20  
21  
22  
39  
38  
37  
36  
35  
FSLA  
SRCCLKT1  
SRCCLKC1  
VDDSRC  
IREF  
GNDA  
VDDA  
CPUCLKT2_ITP/SRCCLKT_7  
CPUCLKC2_ITP/SRCCLKC_7  
SRCCLKT2  
SRCCLKC2 23  
SRCCLKT3 24  
34 VDDSRC  
33 SRCCLKT6  
25  
26  
27  
28  
32  
31  
30  
29  
SRCCLKC3  
SRCCLKT4_SATA  
SRCCLKC4_SATA  
VDDSRC  
SRCCLKC6  
SRCCLKT5  
SRCCLKC5  
GND  
56-Pin SSOP and TSSOP  
* Internal Pull-Up Resistor  
** Internal Pull-Down Resistor  
1
1
1
1
1
1
1
1
0
1
0934A—03/30/09  

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