Datasheet > 935323283097

935323283097

更新时间： 2024-11-08 21:14:07

品牌	Logo	应用领域
恩智浦 - NXP		微控制器外围集成电路
页数	文件大小	规格书
81页	1051K
描述
RISC Microcontroller

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935323283097 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.73
uPs/uCs/外围集成电路类型：	MICROCONTROLLER, RISC	Base Number Matches：	1

935323283097 数据手册

Document Number K61P143M120SF3

Rev. 7, 02/2018

NXP Semiconductors

Data Sheet: Technical Data

K61P143M120SF3

K61 Sub-Family

Supports the following:

MK61FN1M0CAA12

Key features

• Human-machine interface

– Low-power hardware touch sensor interface (TSI)

– General-purpose input/output

• Operating Characteristics

– Voltage range: 1.71 to 3.6 V

– Flash write voltage range: 1.71 to 3.6 V

– Temperature range (ambient): -40 to 85°C

• Analog modules

– Four 16-bit SAR ADCs

– Programmable gain amplifier (PGA) (up to x64)

integrated into each ADC

– Two 12-bit DACs

– Four analog comparators (CMP) containing a 6-bit

DAC and programmable reference input

– Voltage reference

• Performance

– Up to 120 MHz Arm® Cortex®-M4 core with DSP

instructions delivering 1.25 Dhrystone MIPS per

MHz

• Memories and memory interfaces

– Up to 1024 KB program flash memory on non-

FlexMemory devices

• Timers

– Programmable delay block

– Two 8-channel motor control/general purpose/PWM

timers

– Two 2-channel quadrature decoder/general purpose

timers

– Up to 128 KB RAM

– Serial programming interface (EzPort)

– FlexBus external bus interface

– NAND flash controller interface

• Clocks

– IEEE 1588 timers

– 3 to 32 MHz crystal oscillator

– 32 kHz crystal oscillator

– Multi-purpose clock generator

– Periodic interrupt timers

– 16-bit low-power timer

– Carrier modulator transmitter

– Real-time clock

• System peripherals

– Multiple low-power modes to provide power

optimization based on application requirements

– Memory protection unit with multi-master

protection

– 32-channel DMA controller, supporting up to 128

request sources

– External watchdog monitor

– Software watchdog

– Low-leakage wakeup unit

• Communication interfaces

– Ethernet controller with MII and RMII interface to

external PHY and hardware IEEE 1588 capability

– USB high-/full-/low-speed On-the-Go controller

with ULPI interface

– USB full-/low-speed On-the-Go controller with on-

chip transceiver

– USB Device Charger detect (USBDCD)

– Two Controller Area Network (CAN) modules

– Three SPI modules

– Two I2C modules

– Six UART modules

– Secure Digital Host Controller (SDHC)

– Two I2S modules

• Security and integrity modules

– Hardware CRC module to support fast cyclic

redundancy checks

– Tamper detect and secure storage

– Hardware random-number generator

– Hardware encryption supporting DES, 3DES, AES,

MD5, SHA-1, and SHA-256 algorithms

– 128-bit unique identification (ID) number per chip

NXP reserves the right to change the production detail specifications as may be

required to permit improvements in the design of its products.

12 3 4 5 6 7...81

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