Document Number: MPC8377EEC
Rev. 10, 07/2014
Freescale Semiconductor
Technical Data
MPC8377E
PowerQUICC II Pro Processor
Hardware Specifications
Contents
This document provides an overview of the MPC8377E
PowerQUICC II Pro processor features, including a block
diagram showing the major functional components. This
chip is a cost-effective, low-power, highly integrated host
processor that addresses the requirements of several
printing and imaging, consumer, and industrial
applications, including main CPUs and I/O processors in
printing systems, networking switches and line cards,
wireless LANs (WLANs), network access servers (NAS),
VPN routers, intelligent NIC, and industrial controllers.
This chip extends the PowerQUICC family, adding higher
CPU performance, additional functionality, and faster
interfaces while addressing the requirements related to
time-to-market, price, power consumption, and package
size.
1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . 7
3. Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 11
4. Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . 13
5. RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . 15
6. DDR1 and DDR2 SDRAM . . . . . . . . . . . . . . . . . . . 16
7. DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8. Ethernet: Enhanced Three-Speed Ethernet (eTSEC) 23
9. USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
10. Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
11. Enhanced Secure Digital Host Controller (eSDHC) 43
12. JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
13. I2C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
14. PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
15. PCI Express . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
16. Serial ATA (SATA) . . . . . . . . . . . . . . . . . . . . . . . . . . 68
17. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
18. GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
19. IPIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
20. SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
21. High-Speed Serial Interfaces (HSSI) . . . . . . . . . . . . 77
22. Package and Pin Listings . . . . . . . . . . . . . . . . . . . . . 87
23. Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
24. Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
25. System Design Information . . . . . . . . . . . . . . . . . . 119
26. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 121
27. Document Revision History . . . . . . . . . . . . . . . . . . 123
1 Overview
This chip incorporates the e300c4s core, which includes
32 KB of L1 instruction and data caches and on-chip
memory management units (MMUs). The device offers
two enhanced three-speed 10, 100, 1000 Mbps Ethernet
interfaces, a DDR1/DDR2 SDRAM memory controller, a
flexible, a 32-bit local bus controller, a 32-bit PCI
controller, an optional dedicated security engine, a USB
2.0 dual-role controller, a programmable interrupt
© 2008-2012, 2014 Freescale Semiconductor, Inc. All rights reserved.
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