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934045300118 PDF预览

934045300118

更新时间: 2024-11-16 19:56:23
品牌 Logo 应用领域
恩智浦 - NXP 开关脉冲晶体管
页数 文件大小 规格书
8页 68K
描述
TRANSISTOR 45 A, 55 V, 0.024 ohm, N-CHANNEL, Si, POWER, MOSFET, FET General Purpose Power

934045300118 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SMALL OUTLINE, R-PSSO-G2Reach Compliance Code:unknown
ECCN代码:EAR99风险等级:5.31
其他特性:LOGIC LEVEL COMPATIBLE, ESD PROTECTED雪崩能效等级(Eas):80 mJ
外壳连接:DRAIN配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:55 V最大漏极电流 (ID):45 A
最大漏源导通电阻:0.024 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PSSO-G2元件数量:1
端子数量:2工作模式:ENHANCEMENT MODE
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL最大脉冲漏极电流 (IDM):180 A
认证状态:Not Qualified表面贴装:YES
端子形式:GULL WING端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

934045300118 数据手册

 浏览型号934045300118的Datasheet PDF文件第2页浏览型号934045300118的Datasheet PDF文件第3页浏览型号934045300118的Datasheet PDF文件第4页浏览型号934045300118的Datasheet PDF文件第5页浏览型号934045300118的Datasheet PDF文件第6页浏览型号934045300118的Datasheet PDF文件第7页 
Philips Semiconductors  
Product specification  
TrenchMOS transistor  
Logic level FET  
BUK9624-55  
GENERAL DESCRIPTION  
QUICK REFERENCE DATA  
N-channel enhancement mode logic  
level field-effect power transistor in a  
plastic envelope suitable for surface  
mounting. Using ’trench’ technology  
the device features very low on-state  
resistance and has integral zener  
diodes giving ESD protection up to  
2kV. It is intended for use in  
automotive and general purpose  
switching applications.  
SYMBOL  
PARAMETER  
MAX.  
UNIT  
VDS  
ID  
Ptot  
Tj  
Drain-source voltage  
Drain current (DC)  
Total power dissipation  
Junction temperature  
Drain-source on-state  
55  
45  
103  
175  
24  
V
A
W
˚C  
m  
RDS(ON)  
resistance  
VGS = 5 V  
PINNING - SOT404  
PIN CONFIGURATION  
SYMBOL  
PIN  
1
DESCRIPTION  
d
mb  
gate  
2
drain  
g
3
source  
2
mb drain  
s
1
3
LIMITING VALUES  
Limiting values in accordance with the Absolute Maximum System (IEC 134)  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VDS  
VDGR  
±VGS  
ID  
ID  
IDM  
Drain-source voltage  
Drain-gate voltage  
Gate-source voltage  
Drain current (DC)  
-
-
-
-
-
-
-
-
55  
55  
10  
45  
31  
180  
103  
175  
V
V
V
A
A
A
W
˚C  
RGS = 20 kΩ  
-
Tmb = 25 ˚C  
Tmb = 100 ˚C  
Tmb = 25 ˚C  
Tmb = 25 ˚C  
-
Drain current (DC)  
Drain current (pulse peak value)  
Total power dissipation  
Storage & operating temperature  
Ptot  
Tstg, Tj  
- 55  
ESD LIMITING VALUE  
SYMBOL PARAMETER  
CONDITIONS  
MIN.  
MAX.  
UNIT  
VC  
Electrostatic discharge capacitor  
voltage, all pins  
Human body model  
(100 pF, 1.5 k)  
-
2
kV  
THERMAL RESISTANCES  
SYMBOL PARAMETER  
CONDITIONS  
TYP.  
MAX.  
UNIT  
Rth j-mb  
Thermal resistance junction to  
mounting base  
-
-
1.45  
K/W  
Rth j-a  
Thermal resistance junction to  
ambient  
Minimum footprint, FR4  
board  
50  
-
K/W  
April 1998  
1
Rev 1.000  

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