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8440258AKI-45LF PDF预览

8440258AKI-45LF

更新时间: 2024-11-04 20:06:03
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
20页 856K
描述
Clock Generator, 156.25MHz, 5 X 5 MM, 0.925 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFN-32

8440258AKI-45LF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFN
包装说明:5 X 5 MM, 0.925 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, VFQFN-32针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.81
JESD-30 代码:S-XQCC-N32JESD-609代码:e3
长度:5 mm湿度敏感等级:3
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:156.25 MHz
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:2.5 V主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:1 mm
子类别:Clock Generators最大压摆率:125 mA
最大供电电压:2.625 V最小供电电压:2.375 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:5 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

8440258AKI-45LF 数据手册

 浏览型号8440258AKI-45LF的Datasheet PDF文件第2页浏览型号8440258AKI-45LF的Datasheet PDF文件第3页浏览型号8440258AKI-45LF的Datasheet PDF文件第4页浏览型号8440258AKI-45LF的Datasheet PDF文件第5页浏览型号8440258AKI-45LF的Datasheet PDF文件第6页浏览型号8440258AKI-45LF的Datasheet PDF文件第7页 
FemtoClock® Crystal/LVCMOS-to-  
LVDS/LVCMOS Frequency Synthesizer  
ICS8440258I-45  
DATA SHEET  
General Description  
Features  
The ICS8440258I-45 is a eight output synthesizer optimized to  
generate Gigabit and 10 Gigabit Ethernet clocks. Using a 25MHz,  
18pF parallel resonant crystal, the device will generate both  
156.25MHz and 125MHz clocks with mixed LVDS and LVCMOS/  
LVTTL output levels. The ICS8440258I-45 uses IDT’s 3RD  
generation low phase noise VCO technology and can achieve <1ps  
typical rms phase jitter, easily meeting Ethernet jitter requirements.  
The ICS8440258I-45 is packaged in a small, 5mm x 5mm VFQFN  
package that is optimum for applications with space limitations.  
One differential LVDS output at 156.25MHz or 125MHz  
Four differential LVDS outputs at 125MHz  
Three LVCMOS/LVTTL single-ended outputs at 125MHz  
Selectable crystal oscillator interface or LVCMOS/LVTTL  
single-ended input and PLL bypass from a single select pin  
VCO range: 490MHz - 680MHz  
RMS phase jitter @ 125MHz, using a 25MHz crystal  
(1.875MHz - 20MHz): 0.41ps (typical), LVDS outputs  
RMS phase jitter @ 156.25MHz, using a 25MHz crystal  
(1.875MHz - 20MHz): 0.43ps (typical), Q0, nQ0 output  
Full 2.5V supply mode  
-40°C to 85°C ambient operating temperature  
Available in lead-free (RoHS 6) package  
Block Diagram  
Pullup  
nPLL_BYPASS  
Pulldown  
F_SEL  
Q0  
0
Pulldown  
REF_CLK  
0
nQ0  
÷5  
÷4  
25MHz  
VCO  
490-680MHz  
Phase  
Detector  
1
XTAL_IN  
1
OSC  
Q1  
0
1
XTAL_OUT  
nQ1  
÷5  
Pin Assignment  
Q2  
÷25  
nQ2  
Q3  
nQ3  
Q4  
32 31 30 29 28 27 26 25  
1
2
3
4
5
6
7
8
Q0  
nc  
24  
23  
22  
21  
20  
nQ4  
Q5  
nQ0  
VDDO_LVCMOS  
GND  
Q7  
ICS8440258I-45  
32-Lead VFQFN  
5mm x 5mm x 0.925mm  
package body  
GND  
Q6  
Q1  
nQ1  
VDDO_LVDS  
Q2  
VDDO_LVCMOS  
Q5  
Q6  
Q7  
19  
18  
17  
K Package  
Top View  
nQ2  
GND  
9
10 11 12 13 14 15 16  
ICS8440258AKI-45 REVISION A APRIL 28, 2011  
1
©2011 Integrated Device Technology, Inc.  

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