Datasheet > 843N571I

843N571I

更新时间： 2024-11-05 01:12:39

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
24页	450K
描述
FemtoClock NG Clock Synthesizer

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中文翻译

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数据手册

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843N571I 数据手册

FemtoClock® NG Clock Synthesizer

843N571I

Data Sheet

General Description

Features

The 843N571I is a PLL based clock synthesizer for use in Ethernet

applications. The device uses IDT’s fourth generation FemtoClock^®

NG technology for optimal high clock frequency and low phase noise

performance, combined with a low power consumption and high

power supply noise rejection. Using IDT’s latest FemtoClock NG PLL

technology, the 843N571I achieves <0.3ps RMS phase jitter

performance.

• Fourth generation FemtoClock^®Next Generation (NG) technology

• Seven single-ended LVCMOS outputs, 30 output impedance

• Three LVPECL output pairs

One differential LVPECL (QA, nQA) output pair: 156.25MHz

Two selectable differential LVPECL output pairs (QB, nQB and

QC, nQC): 100MHz and 125MHz

• One single-ended LVCMOS (QD0) 33.33MHz CPU clock

• Selectable external crystal or single-ended input source

843N571I can synthesize 100MHz, 125MHz, 156.25MHz and a low

frequency 33.33MHz CPU clock from a single device. Six LVCMOS

outputs also serve as additional buffering of the 25MHz crystal

reference.

• Crystal oscillator interface designed for 25MHz, parallel resonant

crystal

• FemtoClock NG frequency multiplier provides low jitter, high

frequency output

• FemtoClock NG VCO frequency: 2.5GHz

• RMS phase jitter @ 125MHz, using a 25MHz crystal

(12kHz – 20MHz): 0.283ps (typical)

• Power supply noise rejection PSNR: -80dB

• 3.3V supply voltage

• -40C to 85C ambient operating temperature

• Lead-free (RoHS 6) packaging

Pin Assignment

40 39 38 37 36 35 34 33 32 31

QREF3

V_EE

QREF2

V_CC

QREF0

QREF1

ICS843N571I

FREQSEL

V_CC

40-Lead VFQFN

6mm x 6mm x 0.925mm

package body

K Package

V_CC

XTAL_IN

XTAL_OUT

REFCLK

REFSEL

V_EE

V_CC

Top View

QD0

nQC

11 12 13 14 15 16 17 18 19 20

Revision B April 20, 2016

12 3 4 5 6 7...24

中文翻译

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