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84329AV-01T PDF预览

84329AV-01T

更新时间: 2024-11-03 08:09:31
品牌 Logo 应用领域
艾迪悌 - IDT 晶体时钟发生器微控制器和处理器外围集成电路
页数 文件大小 规格书
20页 334K
描述
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

84329AV-01T 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:LCC包装说明:11.60 X 11.40 MM, 4.10 MM HEIGHT, PLASTIC, MS-018, LCC-28
针数:28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.91Is Samacsys:N
JESD-30 代码:S-PQCC-J28JESD-609代码:e0
长度:11.505 mm湿度敏感等级:1
端子数量:28最高工作温度:70 °C
最低工作温度:最大输出时钟频率:700 MHz
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC28,.5SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):225
电源:3.3 V主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:4.57 mm
子类别:Clock Generators最大压摆率:110 mA
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:J BEND
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:11.505 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

84329AV-01T 数据手册

 浏览型号84329AV-01T的Datasheet PDF文件第2页浏览型号84329AV-01T的Datasheet PDF文件第3页浏览型号84329AV-01T的Datasheet PDF文件第4页浏览型号84329AV-01T的Datasheet PDF文件第5页浏览型号84329AV-01T的Datasheet PDF文件第6页浏览型号84329AV-01T的Datasheet PDF文件第7页 
ICS84329-01  
700MHZ, LOW JITTER, CRYSTAL-TO-3.3V  
DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER  
GENERAL DESCRIPTION  
FEATURES  
The ICS84329-01 is a general purpose, single output high  
frequency synthesizer. The VCO operates at a frequency range  
of 200MHz to 700MHz. The VCO frequency is programmed in  
steps equal to the value of thecrystal frequency divided by  
16. The VCO and output frequency can be programmed  
using the serial or parallel interfaces to the configuration logic.  
The output can be configured to divide the VCO frequency by  
1, 2, 4, and 8. Output frequency steps as small as 125kHz to  
1MHz can be achieved using a 16MHz crystal depending on  
the output dividers.  
Fully integrated PLL, no external loop filter requirements  
1 differential 3.3V LVPECL output  
Crystal oscillator interface  
Output frequency range: 25MHz to 700MHz  
VCO range: 200MHz to 700MHz  
Parallel interface for programming counter  
and output dividers during power-up  
Serial 3 wire interface  
RMS Period jitter: 5.5ps (maximum)  
Cycle-to-cycle jitter: 35ps (maximum)  
3.3V supply voltage  
0°C to 70°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free  
(RoHS 6) packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
M0  
M1  
M2  
M3  
M4  
M5  
M6  
M7  
M8  
N0  
N1  
VEE  
TEST  
VCC  
1
2
3
4
5
6
7
8
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
nP_LOAD  
VCC  
XTAL2  
XTAL1  
nc  
XTAL1  
OSC  
XTAL2  
nc  
VCCA  
÷ 16  
S_LOAD  
S_DATA  
S_CLOCK  
VCC  
FOUT  
nFOUT  
VEE  
9
10  
11  
12  
13  
14  
PLL  
PHASE DETECTOR  
÷1  
÷2  
÷4  
÷8  
1
0
FOUT  
nFOUT  
VCO  
÷ M  
ICS84329-01  
28-Lead SOIC  
7.5mm x 18.05mm x 2.25mm package body  
M Package  
Top View  
S_LOAD  
S_DATA  
S_CLOCK  
nP_LOAD  
CONFIGURATION  
INTERFACE  
LOGIC  
TEST  
M0:M8  
N0:N1  
25 24 23 22 21 20 19  
S_CLOCK  
26  
18  
N1  
N0  
M8  
M7  
M6  
M5  
M4  
S_DATA  
S_LOAD  
27  
28  
1
17  
16  
15  
14  
13  
12  
ICS84329-01  
28-Lead PLCC  
11.6mm x 11.4mm x 4.1mm  
VCCA  
nc  
2
V Package  
Top View  
nc  
3
XTAL1  
4
5
6
7
8
9 10 11  
84329AM-01  
www.idt.com  
REV. D AUGUST 7, 2010  
1

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