PRELIMINARY
FEMTOCLOCKS™ CRYSTAL-TO-
3.3V LVPECL CLOCK GENERATOR
ICS843252I-04
GENERAL DESCRIPTION
FEATURES
The ICS843252I-04 is a 10Gb/12Gb Ethernet Clock
• Two differential 3.3V LVPECL output
ICS
HiPerClockS™
Generator and a member of the HiPerClocksTM family
of high performance devices from IDT. The
ICS843252I-04 can synthesize 10 Gigabit Ethernet
and 12 Gigabit Ethernet with a 25MHz crystal. It
• Crystal oscillator interface designed for
18pF parallel resonant crystals
• Crystal input frequency range: 19.33MHz - 30MHz
• Output frequency range: 145MHz - 187.5MHz
• VCO frequency range: 580MHz - 750MHz
can also generate SATA and 10Gb Fibre Channel reference
clock frequencies with the appropriate choice of crystals. The
ICS843252I-04 has excellent phase jitter performance and is
packaged in a small 16-pin TSSOP, making it ideal for use in
systems with limited board space.
• RMS phase jitter at 156.25MHz (1.875MHz - 20MHz):
0.39ps (typical)
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
CONFIGURATION TABLE WITH 25MHZ CRYSTAL
Inputs
Crystal Frequency
25MHz
Feedback Divide
VCO Frequency
750MHz
N Output Divide
Output Frequency Application
÷30
÷25
÷4
÷4
187.5MHz
12 Gigabit Ethernet
10 Gigabit Ethernet
25MHz
625MHz
156.25MHz
CONFIGURATION TABLE WITH SELECTABLE CRYSTALS
Inputs
Crystal Frequency Feedback Divide VCO Frequency N Output Divide
Output Frequency Application
20MHz
21.25MHz
24MHz
÷30
÷30
÷25
÷25
÷25
600MHz
637.5MHz
600MHz
÷4
÷4
÷4
÷4
÷4
150MHz
159.375MHz
150MHz
SATA
10 Gigabit Fibre Channel
SATA
25.5MHz
30MHz
637.5MHz
750MHz
159.375MHz
187.5MHz
10 Gigabit Fibre Channel
12 Gigabit Ethernet
BLOCK DIAGRAM
PIN ASSIGNMENT
Pullup
OE
D
1
2
3
4
5
6
7
8
nQ1
Q1
VCCO
OE
16
15
14
13
12
11
10
9
XTAL_IN
XTAL_OUT
VEE
REF_CLK
CLK_SEL
VCC
Q
Pulldown
nPLL_SEL
LE
Pulldown
REF_CLK
nPLL_SEL
VCCO
1
0
1
0
DIV. N
÷4
Q0
Q0
nQ0
VCCA
FREQ_SEL
XTAL_IN
OSC
nQ0
VCO
Phase
Detector
580MHz-750MHz
Q1
nQ1
ICS843252I-04
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm
package body
XTAL_OUT
Pulldown
CLK_SEL
0 = ÷25 (default)
G Package
Top View
1 = ÷30
Pulldown
FREQ_SEL
The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization
and/or qualification.Integrated DeviceTechnology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT™ / ICS™ 3.3V LVPECL CLOCK GENERATOR
1
843252AGI-04 REV. A JUNE 1, 2007