ICS8430-71
Integrated
Circuit
Systems, Inc.
700MH
Z, LOW
J
ITTER, CRYSTAL
I
NTERFACE
/
LVCMOS-TO-3.3V LVPECL FREQUENCY
SYNTHESIZER
GENERAL DESCRIPTION
FEATURES
The ICS8430-71 is a general purpose, dual output • Dual differential 3.3V LVPECL outputs
ICS
Crystal/LVCMOS-to-3.3V Differential LVPECL High
• Selectable crystal oscillator interface
Frequency Synthesizer and a member of the
or LVCMOS TEST_CLK
HiPerClockS™
HiPerClockS™family of High Performance Clock
Solutions from ICS.The ICS8430-71 has a select-
• Output frequency up to 700MHz
able crystal oscillator interface or LVCMOS TEST_CLK. The
VCO operates at a frequency range of 250MHz to 700MHz.
With the output configured to divide the VCO frequency by 2,
output frequency steps as small as 2MHz can be achieved using
a 16MHz crystal or test clock. Output frequencies up to 700MHz
can be programmed using the serial or parallel interfaces to the
configuration logic. The low jitter and frequency range of the
ICS8430-71 make it an ideal clock generator for most clock
tree applications.
• Crystal input frequency range: 12MHz to 27MHz
• VCO range: 250MHz to 700MHz
• Parallel or serial interface for programming counter
and output dividers
• RMS period jitter: 9ps (maximum)
• Cycle-to-cycle jitter: 25ps (maximum)
• 3.3V supply voltage
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
BLOCK DIAGRAM
PIN ASSIGNMENT
VCO_SEL
XTAL_SEL
32 31 30 29 28 27 26 25
VCC
16k
16k
16k
M5
M6
M7
M8
N0
N1
N2
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
XTAL1
TEST_CLK
0
1
TEST_CLK
XTAL_SEL
VCCA
VEE
XTAL1
XTAL2
ICS8430-71
OSC
S_LOAD
S_DATA
S_CLOCK
MR
÷ 16
VEE
9
10 11 12 13 14 15 16
PLL
PHASE DETECTOR
0
1
VCO
FOUT0
nFOUT0
FOUT1
nFOUT1
MR
÷ N
32-Lead LQFP
÷ M
7mm x 7mm x 1.4mm package body
÷ 2
Y Package
TopView
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
CONFIGURATION
INTERFACE
LOGIC
TEST
M0:M8
N0:N2
8430AY-71
www.icst.com/products/hiperclocks.html
REV. B JANUARY 27, 2005
1