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843002AKI-41T PDF预览

843002AKI-41T

更新时间: 2024-01-09 03:58:48
品牌 Logo 应用领域
艾迪悌 - IDT 石英晶振压控振荡器衰减器
页数 文件大小 规格书
23页 1534K
描述
700MHZ, FEMTOCLOCKTM VCXO BASED SONET/SDH JITTER ATTENUATOR

843002AKI-41T 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:VFQFPN
包装说明:VFQFN-32针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.35
JESD-30 代码:S-XQCC-N32JESD-609代码:e3
长度:5 mm湿度敏感等级:3
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:700 MHz
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3.3 V主时钟/晶体标称频率:19.44 MHz
认证状态:Not Qualified座面最大高度:1 mm
子类别:Clock Generators最大压摆率:210 mA
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn) - annealed端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:5 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

843002AKI-41T 数据手册

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ICS843002I-41  
700MHZ, FEMTOCLOCKS™ VCXO BASED SONET/SDH JITTER ATTENUATOR  
nQA, nQB  
QA, QB  
tPW  
tPERIOD  
tPW  
odc =  
x 100ꢀ  
tPERIOD  
Output Duty Cycle/Pulse Width/Period  
Application Information  
Recommendations for Unused Input and Output Pins  
Inputs:  
Outputs:  
CLK/nCLK Inputs  
LVPECL Outputs  
For applications not requiring the use of the differential input, both  
CLKx and nCLKx can be left floating. Though not required, but for  
additional protection, a 1kresistor can be tied from CLKx to  
ground.  
All unused LVPECL outputs can be left floating. We recommend  
that there is no trace attached. Both sides of the differential output  
pair should either be left floating or terminated.  
LVCMOS Outputs  
LVCMOS Control Pins  
All unused LVCMOS output can be left floating. There should be no  
trace attached.  
All control pins have internal pull-ups or pull-downs; additional  
resistance is not required but can be added for additional  
protection. A 1kresistor can be used.  
IDT™ / ICS™ VCXO BASED SONET/SDH JITTER ATTENUATOR  
10  
ICS843002AKI-41 REV. A OCTOBER 25, 2007  

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