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83052AGI PDF预览

83052AGI

更新时间: 2024-11-03 20:03:35
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管逻辑集成电路
页数 文件大小 规格书
17页 189K
描述
Multiplexer, 83052 Series, 1-Func, 2 Line Input, 1 Line Output, True Output, PDSO8, 4.40 X 3 MM, 0.925 MM HEIGHT, MO1-53, TSSOP-8

83052AGI 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:4.40 X 3 MM, 0.925 MM HEIGHT, MO1-53, TSSOP-8针数:8
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.36
其他特性:ALSO OPERATES WITH 3.3V SUPPLY系列:83052
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:4.4 mm逻辑集成电路类型:MULTIPLEXER
湿度敏感等级:1功能数量:1
输入次数:2输出次数:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240传播延迟(tpd):4.2 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:3 mmBase Number Matches:1

83052AGI 数据手册

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2:1, Single-Ended Multiplexer  
ICS83052I  
DATA SHEET  
GENERAL DESCRIPTION  
FEATURES  
The ICS83052I is a low skew, 2:1, Single-ended Multiplexer. The  
ICS83052I has two selectable single-ended clock inputs and one  
single-ended clock output. The output has a VDDO pin which may  
be set at 3.3V, 2.5V, or 1.8V, making the device ideal for use in  
voltage trans-lation applications. An output enable pin places the  
output in a high impedance state which may be useful for testing  
or debug. The device operates up to 250MHz and is packaged in  
an 8 TSSOP.  
• 2:1 single-ended multiplexer  
• Q nominal output impedance: 15Ω (VDDO = 3.3V)  
Maximum output frequency: 250MHz  
Propagation delay: 2.7ns (maximum), (VDD = VDDO = 3.3V)  
• Input skew: 160ps (maximum), (VDD = VDDO = 3.3V)  
• Part-to-part skew: 490ps (maximum), (VDD = VDDO = 3.3V)  
Additive phase jitter, RMS at 155.52MHz (12kHz - 20MHz):  
0.18ps (typical), (VDD = VDDO = 3.3V)  
Operating supply modes:  
VDD/VDDO  
3.3V/3.3V  
3.3V/2.5V  
3.3V/1.8V  
2.5V/2.5V  
2.5V/1.8V  
-40°C to 85°C ambient operating temperature  
Available in standard (RoHS 5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
VDDO  
GND  
CLK1  
VDD  
Q
1
2
3
4
8
7
6
5
CLK0  
SEL0  
CLK0  
OE  
Q
CLK1  
ICS83052I  
8-Lead TSSOP  
4.40mm x 3.0mm x 0.925mm  
package body  
SEL0  
OE  
G Package  
Top View  
ICS83052I REVISION B DECEMBER 8, 2011  
1
©2011 Integrated Device Technology, Inc.  

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