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83052I-01 PDF预览

83052I-01

更新时间: 2024-11-28 01:11:43
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
15页 314K
描述
2-Bit, 2:1, Single-Ended Multiplexer

83052I-01 数据手册

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2-Bit, 2:1, Single-Ended Multiplexer  
83052I-01  
Datasheet  
General Description  
Features  
The 83052I-01 is a 2-bit, 2:1, Single-ended Multiplexer and a  
member of the family of High Performance Clock Solutions from  
IDT. The 83052I-01 has two selectable single-ended clock inputs  
and two single-ended clock outputs. The output has a VDDO pin  
which may be set at 3.3V, 2.5V, or 1.8V, making the device ideal for  
use in voltage translation applications. An output enable pin  
places the output in a high impedance state which may be useful  
for testing or debug. Possible applications include systems with up  
to two transceivers which need to be independently set for  
different rates. For example, a board may have two transceivers,  
each of which need to be independently configured for 1 Gigabit  
Ethernet or 1 Gigabit Fibre Channel rates. Another possible  
application may require the ports to be independently set for FEC  
(Forward Error Correction) or non-FEC rates. The device operates  
up to 250MHz and is packaged in a 16 TSSOP.  
2-bit, 2:1 single-ended multiplexer  
Nominal output impedance: 15(VDDO = 3.3V)  
Maximum output frequency: 250MHz  
Propagation delay: 3ns (maximum), VDD = VDDO = 3.3V  
Input skew: 85ps (maximum), VDD = VDDO = 3.3V  
Part-to-part skew: 500ps (maximum), VDD = VDDO = 3.3V  
Output skew: 65ps (maximum), VDD = VDDO = 3.3V  
Additive phase jitter, RMS (12KHz - 20MHz):  
0.15ps (typical)  
Operating supply modes:  
VDD/VDDO  
3.3V/3.3V  
3.3V/2.5V  
3.3V/1.8V  
2.5V/2.5V  
2.5V/1.8V  
-40°C to 85°C ambient operating temperature  
Available in lead-free (RoHS 6) package  
Pin Assignment  
Block Diagram  
Pulldown  
Pulldown  
Pulldown  
SEL0  
nc  
VDDO  
nc  
1
2
16 nc  
15  
VDDO  
nc  
GND  
Q0  
14  
13  
3
4
CLK0  
CLK1  
0
1
GND  
Q1  
SEL1  
CLK1  
VDD  
12  
11  
10  
9
5
6
7
8
Q0  
SEL0  
CLK0  
OE  
83052I-01  
16-Lead TSSOP  
4.4mm x 5.0mm x 0.925mm  
package body  
0
1
Q1  
G Package  
Pulldown  
Pullup  
SEL1  
OE  
©2015 Integrated Device Technology, Inc  
1
December 16, 2015  

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