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74VHCT240ASJ_07 PDF预览

74VHCT240ASJ_07

更新时间: 2024-11-04 12:23:31
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
9页 233K
描述
Octal Buffer/Line Driver with 3-STATE Outputs

74VHCT240ASJ_07 数据手册

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May 2007  
74VHCT240A  
tm  
Octal Buffer/Line Driver with 3-STATE Outputs  
Features  
General Description  
High Speed: t = 5.6ns (Typ.) at V = 5V  
The VHCT240A is an advanced high speed CMOS octal  
bus transceiver fabricated with silicon gate CMOS  
technology. It achieves high speed operation similar to  
equivalent Bipolar Schottky TTL while maintaining the  
CMOS low power dissipation. The VHCT240A is an  
inverting 3-STATE buffer having two active-LOW output  
enables. This device is designed to be used as 3-STATE  
memory address drivers, clock drivers, and bus oriented  
transmitter/ receivers.  
PD  
CC  
Power down protection is provided on inputs and  
outputs  
Low power dissipation: I = 4µA (Max.) @ T = 25°C  
CC  
A
Pin and function compatible with 74HCT240  
Protection circuits ensure that 0V to 7V can be applied to  
(1)  
the input and output pins without regard to the supply  
voltage. These circuits prevent device destruction due to  
mismatched supply and input/output voltages. This  
device can be used to interface 5V to 3V systems and  
two supply systems such as battery back up.  
Note:  
1. Outputs in OFF-State  
Ordering Information  
Package  
Order Number  
74VHCT240AM  
Number  
Package Description  
M20B  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74VHCT240ASJ  
74VHCT240AMTC  
M20D  
MTC20  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the  
ordering number. Pb-Free package per JEDEC J-STD-020B.  
©1997 Fairchild Semiconductor Corporation  
74VHCT240A Rev. 1.3  
www.fairchildsemi.com  

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