Datasheet > 74VHCT00A_07

74VHCT00A_07

更新时间： 2024-11-24 12:23:31

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		栅
页数	文件大小	规格书
8页	297K
描述
Quad 2-Input NAND Gate

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74VHCT00A_07 数据手册

December 2007

74VHCT00A

Quad 2-Input NAND Gate

Features

General Description

■ High speed: t = 5.0ns (Typ.) at T = 25°C

The VHCT00A is an advanced high-speed CMOS

2-Input NAND Gate fabricated with silicon gate CMOS

technology. It achieves the high-speed operation similar

to equivalent Bipolar Schottky TTL while maintaining the

CMOS low power dissipation. The internal circuit is

composed of 3 stages, including buffer output, which

provide high noise immunity and stable output.

■ High noise immunity: V = 2.0V, V = 0.8V

■ Power down protection is provided on all inputs and

outputs

■ Low noise: V

= 0.8V (Max.)

OLP

■ Low power dissipation: I = 2A (Max.) at T = 25°C

■ Pin and function compatible with 74HCT00

Protection circuits ensure that 0V to 7V can be applied to

the input pins without regard to the supply voltage and to

the output pins with V

= 0V. These circuits prevent

device destruction due to mismatched supply and input/

output voltages. This device can be used to interface 3V

to 5V systems and two supply systems such as battery

backup.

Ordering Information

Package

Order Number

Number

Package Description

74VHCT00AM

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012,

0.150" Narrow

74VHCT00ASJ

M14D

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHCT00AMTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,

4.4mm Wide

Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.

All packages are lead free per JEDEC: J-STD-020B standard.

74VHCT00A Rev. 1.4.0

www.fairchildsemi.com

12 3 4 5 6 7 8

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