Datasheet > 74VHC16244

74VHC16244

更新时间： 2024-11-16 08:04:47

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输出元件
页数	文件大小	规格书
10页	145K
描述
16-BIT BUS BUFFER WITH 3-STATE OUTPUTS (NON INVERTED)

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74VHC16244 数据手册

74VHC16244

16-BIT BUS BUFFER

WITH 3-STATE OUTPUTS (NON INVERTED)

■

HIGH SPEED:

= 5.4 ns (TYP.) at V = 5V

LOW POWER DISSIPATION:

= 4 µA (MAX.) at T =25°C

HIGH NOISE IMMUNITY:

= V = 28% V (MIN.)

NIH

NIL

TSSOP

TUBE

■

POWER DOWN PROTECTION ON INPUTS

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 8 mA (MIN)

■

BALANCED PROPAGATION DELAYS:

ORDER CODES

PACKAGE

PLH

PHL

T & R

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 5.5V

TSSOP

74VHC16244TTR

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 16244

PIN CONNECTION

■

IMPROVED LATCH-UP IMMUNITY

LOW NOISE: V

= 0.9V (MAX.)

OLP

DESCRIPTION

The 74VHC16244 is an advanced high-speed

CMOS 16-BIT BUS BUFFER (3-STATE) fabricat-

ed with sub-micron silicon gate and double-layer

metal wiring C MOS tecnology.

Any nG output control governs four BUS

BUFFERS. Output Enable inputs (nG) tied

together give full 16 bit operation.

When nG is LOW, the outputs are enabled. When

nG is HIGH, the output are in high impedance

state.

The device is designed to be used with 3-state

memory address drivers, etc.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no re-

gard to the supply voltage. This device can be

used to interface 5V to 3V.

All inputs and outputs are equipped with protec-

tion circuits against static discharge, giving them

2KV ESD immunity and transient excess voltage.

February 2003

1/10

12 3 4 5 6 7...10

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