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74LVX163 PDF预览

74LVX163

更新时间: 2024-11-11 08:04:39
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美国国家半导体 - NSC 计数器
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8页 136K
描述
Low Voltage Synchronous Binary Counter with Synchronous Clear

74LVX163 数据手册

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December 1996  
74LVX163  
Low Voltage Synchronous Binary Counter with  
Synchronous Clear  
General Description  
The LVX163 is a synchronous modulo-16 binary counter.  
This device is synchronously presettable for application in  
programmable dividers and has two types of Count Enable  
inputs plus a Terminal Count output for versatility in forming  
multistage counters. The CLK input is active on the rising  
edge. Both PE and CLR inputs are active on low logic lev-  
els. Presetting is synchronous to rising edge of CLK and the  
Clear function of the LVX163 is synchronous to CLK. Two  
enable inputs (ENP and ENT) and Carry Output are provid-  
ed to enable easy cascading of counters, which facilitates  
easy implementation of n-bit counters without using external  
gates.  
The inputs tolerate voltages up to 7V allowing the interface  
of 5V systems to 3V systems.  
Features  
Y
Input voltage level translation from 5V to 3V  
Y
Ideal for low power/low noise 3.3V applications  
Y
Available in SOIC JEDEC, SOIC EIAJ, and TSSOP  
packages  
Y
Guaranteed simultaneous switching noise and dynamic  
threshold performance  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Assignment for  
TSSOP and SOIC  
TL/F/12157–1  
TL/F/12157–3  
TL/F/12157–2  
Pin  
SOIC JEDEC  
SOIC EIAJ  
TSSOP  
Description  
Names  
Order Number  
74LVX163M  
74LVX163SJ  
74LVX163MTC  
74LVX163MTCX  
CEP  
CET  
CP  
Count Enable Parallel Input  
Count Enable Trickle Input  
Clock Pulse Input  
74LVX163MX  
74LVX163SJX  
See NS Package  
Number  
M16A  
M16D  
MTC16  
MR  
Synchronous Master Reset Input  
Parallel Data Inputs  
P
0
–P  
3
PE  
Parallel Enable Inputs  
Flip-Flop Outputs  
Q
–Q  
3
0
TC  
Terminal Count Output  
C
1996 National Semiconductor Corporation  
TL/F/12157  
RRD-B30M17/Printed in U. S. A.  
http://www.national.com  

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