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74LVX16374TTR PDF预览

74LVX16374TTR

更新时间: 2024-11-10 22:53:19
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 总线驱动器总线收发器触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
10页 278K
描述
LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP FLOP (3-STATE) WITH 5V TOLERANT INPUTS

74LVX16374TTR 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP48,.3,20
针数:48Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.73
Is Samacsys:N系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
长度:12.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:70000000 Hz
最大I(ol):0.004 A位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 VProp。Delay @ Nom-Sup:18.5 ns
传播延迟(tpd):24 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:6.1 mmBase Number Matches:1

74LVX16374TTR 数据手册

 浏览型号74LVX16374TTR的Datasheet PDF文件第2页浏览型号74LVX16374TTR的Datasheet PDF文件第3页浏览型号74LVX16374TTR的Datasheet PDF文件第4页浏览型号74LVX16374TTR的Datasheet PDF文件第5页浏览型号74LVX16374TTR的Datasheet PDF文件第6页浏览型号74LVX16374TTR的Datasheet PDF文件第7页 
74LVX16374  
LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP FLOP (3-STATE)  
WITH 5V TOLERANT INPUTS  
HIGH SPEED:  
= 160 MHz (TYP.) at V = 3V  
f
MAX  
CC  
5V TOLERANT INPUTS  
POWER DOWN PROTECTION ON INPUTS  
INPUT VOLTAGE LEVEL:  
V
= 0.8V, V = 2V at V =3V  
IH CC  
IL  
TSSOP  
TUBE  
LOW POWER DISSIPATION:  
= 4 µA (MAX.) at T =25°C  
I
CC  
A
LOW NOISE:  
= 0.3V (TYP.) at V =3.3V  
ORDER CODES  
PACKAGE  
V
OLP  
CC  
T & R  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 4 mA (MIN) at V =3V  
TSSOP  
74LVX16374TTR  
OH  
OL  
CC  
BALANCED PROPAGATION DELAYS:  
PIN CONNECTION  
t
t
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 3.6V (1.2V Data Retention)  
V
CC  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 16373  
IMPROVED LATCH-UP IMMUNITY  
DESCRIPTION  
The 74LVX16374 is a low voltage CMOS 16 BIT  
D-TYPE FLIP-FLOP with 3 STATE OUTPUTS  
NON INVERTING fabricated with sub-micron  
2
silicon gate and double-layer metal wiring C MOS  
technology. It is ideal for low power, battery  
operated and low noise 3.3V applications.  
These 16 bit D-TYPE flip-flop is controlled by two  
clock inputs (CK) and two output enable inputs  
(nOE). The device can be used as two 8-bit  
flip-flops or one 16-bit flip-flop.On the positive  
transition of the clock, the Q outputs will be set to  
the logic state that were setup at the D inputs.  
While the (OE) input is low, the outputs will be in  
a normal logic state (high or low logic level); while  
OE is high, the outputs will be in a high impedance  
state.The output control does not affect the inter-  
nal operation of flip-flops; that is, the old data can  
be retained or the new data can be entered even  
while the outputs are off.Power down protection is  
provided on all inputs and 0 to 7V can be accepted  
on inputs with no regard to the supply voltage.This  
device can be used to interface 5V to 3V. All in-  
puts and outputs are equipped with protection cir-  
cuits against static discharge, giving them 2KV  
ESD immunity and transient excess voltage.  
February 2003  
1/10  

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