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Datasheet > 74LVT162374DGG,112
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74LVT162374DGG,112

更新时间： 2024-12-01 21:08:15
品牌 Logo 应用领域
恩智浦 - NXP 驱动信息通信管理光电二极管逻辑集成电路
页数 文件大小 规格书
17页 80K
描述
74LVT162374 - 3.3 V 16-bit edge-triggered D-type flip-flop with 30 Ohm termination resistors; 3-state TSSOP 48-Pin

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74LVT162374DGG,112 技术参数

Source Url Status Check Date：2013-06-14 00:00:00是否Rohs认证： 符合
生命周期：Transferred零件包装代码：TSSOP
包装说明：6.10 MM, PLASTIC, MO-153, SOT-362-1, TSSOP-48针数：48
Reach Compliance Code：compliant风险等级：5.7
Base Number Matches：1

74LVT162374DGG,112 数据手册

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74LVT162374  
3.3 V 16-bit edge-triggered D-type flip-flop with 30 Ω  
termination resistors; 3-state  
Rev. 03 — 17 January 2005  
Product data sheet  
1. General description  
The 74LVT162374 is a high performance BiCMOS product designed for VCC operation at  
3.3 V.  
The 74LVT162374 is designed with 30 Ω series resistance in both the HIGH and LOW  
states of the output. This design reduces line noise in applications such as memory  
address drivers, clock drivers, and bus receivers/transmitters.  
This device is a 16-bit edge-triggered D-type flip-flop featuring non-inverting 3-state  
outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the  
positive transition of the clock (CP), the Q outputs of the flip-flop take on the logic levels  
set up at the D inputs.  
2. Features  
■ 16-bit edge-triggered flip-flop  
■ 3-state buffers  
■ Output capability: +12 mA and −12 mA  
■ TTL input and output switching levels  
■ Input and output interface capability to systems at 5 V supply  
■ Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused  
inputs  
■ Live insertion and extraction permitted  
■ Outputs include series resistance of 30 Ω making external resistors unnecessary  
■ Power-up reset  
■ Power-up 3-state  
■ No bus current loading when output is tied to 5 V bus  
■ Latch-up protection exceeds 500 mA per JESD78  
■ ESD protection:  
◆ MIL STD 883 method 3015: exceeds 2000 V  
◆ Machine model: exceeds 200 V  
 
 
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