Datasheet > 74LVCH373ASO

74LVCH373ASO

更新时间： 2024-11-06 07:18:43

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
6页	63K
描述
SOIC-20, Tube

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74LVCH373ASO 数据手册

IDT74LVCH373A

3.3VCMOSOCTALTRANSPARENTD-TYPELATCH

EXTENDEDCOMMERCIALTEMPERATURERANGE

3.3V CMOS OCTAL

IDT74LVCH373A

TRANSPARENT D-TYPE LATCH

WITH 3-STATE OUTPUTS, 5 VOLT

TOLERANT I/O AND BUS-HOLD

DESCRIPTION:

FEATURES:

–

0.5 MICRON CMOS Technology

The LVCH373A octal transparent D-type latch is built using advanced

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

1.27mm pitch SOIC, 0.65mm pitch SSOP,

0.635mm pitch QSOP, 0.65mm pitch TSSOP packages

Extended commercial range of – 40°C to +85°C

VCC = 3.3V ±0.3V, Normal Range

dualmetalCMOStechnology.Whilethelatch-enable(LE)inputishigh,the

Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs

are latched at the logic levels set up at the D inputs.

–

A buffered output-enable (OE) input can be used to place the eight

outputs in either a normal logic state (high or low logic levels) or a high-

impedancestate.Inthehigh-impedancestate,theoutputsneitherloadnor

drivethebuslinessignificantly. OEdoesnotaffecttheinternaloperations

of the latches. Old data can be retained or new data can be entered while

the outputs are in the high-impedance state.

VCC = 2.3V to 3.6V, Extended Range

CMOS power levels (0.4µW typ. static)

Rail-to-Rail output swing for increased noise margin

All inputs, outputs and I/O are 5 Volt tolerant

Supports hot insertion

The LVCH373A has been designed with a ±24mA output driver. This

driver is capable of driving a moderate to heavy load while maintaining

speedperformance.

Drive Features for LVCH373A:

–

High Output Drivers: ±24mA

Reduced system switching noise

Inputscanbedrivenfromeither3.3Vor5Vdevices. Thisfeatureallows

the use of this device as a translator in a mixed 3.3V/5V system environ-

ment.

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

The LVCH373A has “bus-hold” which retains the inputs’ last state

whenevertheinputgoestoahighimpedance.Thispreventsfloatinginputs

and eliminates the need for pull-up/down resistors.

FUNCTIONAL BLOCK DIAGRAM

TO SEVEN OTHER CHANNELS

EXTENDED COMMERCIAL TEMPERATURE RANGE

OCTOBER 1999

1999 Integrated Device Technology, Inc.

DSC-4630/-

12 3 4 5 6

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与74LVCH373ASO相关器件

型号	品牌	获取价格	描述	数据表
74LVCH374AD	ETC	获取价格	Octal D-Type Flip-Flop
74LVCH374ADB	ETC	获取价格	Octal D-Type Flip-Flop
74LVCH374ADB-T	NXP	获取价格	LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
74LVCH374APG	IDT	获取价格	TSSOP-20, Tube
74LVCH374APW	ETC	获取价格	Octal D-Type Flip-Flop
74LVCH374APW-T	NXP	获取价格	LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
74LVCH374APY	IDT	获取价格	SSOP-20, Tube
74LVCH374AQ	IDT	获取价格	QSOP-20, Tube
74LVCH374ASO	IDT	获取价格	SOIC-20, Tube
74LVCH541AD	PHILIPS	获取价格	Bus Driver, 1-Func, 8-Bit, True Output, CMOS, PDSO20,