IDT74LVCH574A
INDUSTRIALTEMPERATURERANGE
3.3VCMOSOCTALEDGE-TRIGGEREDD-TYPEFLIP-FLOP
3.3V CMOS OCTAL EDGE-
TRIGGERED D-TYPE FLIP-FLOP
IDT74LVCH574A
WITH 3-STATE OUTPUTS, 5 VOLT
TOLERANT I/O AND BUS-HOLD
DESCRIPTION:
FEATURES:
The LVCH574A octal edge-triggered D-type flip-flop is built using ad-
• 0.5 MICRON CMOS Technology
vanceddual-metalCMOStechnology. Thedevicefeatures3-stateoutputs
designed specifically for driving highly capacitive or relatively low-imped-
ance loads. The LVCH574A is particularly suitable for implementing buffer
registers, input-output (I/O) ports, bidirectional bus drivers, and working
registers.
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
• Rail-to-rail output swing for increased noise margin
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
Onthepositivetransitionoftheclock(CLK)input, theQoutputsaresetto
the logic levels at the data (D) inputs.
Abufferedoutput-enable(OE)inputcanbeusedtoplacetheeightoutputs
in either a normal logic state (high or low logic levels) or a high-impedance
state.Inthehigh-impedancestate,theoutputsneitherloadnordrivethebus
linessignificantly. OEdoesnotaffecttheinternaloperationsoftheflip-flops.
Old data can be retained or new data can be entered while the outputs are
inthehigh-impedancestate.
The LVCH574A has been designed with a ±24mA output driver. This
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed
performance.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
theuseofthisdeviceasatranslatorinamixed3.3V/5Vsystemenvironment.
The LVCH574A has “bus-hold” which retains the inputs’ last state
whenevertheinputgoestoahighimpedance.This preventsfloatinginputs
and eliminates the need for pull-up/down resistors.
• Available in SOIC, SSOP, QSOP, and TSSOP packages
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
FUNCTIONALBLOCKDIAGRAM
1
OE
11
CLK
C1
19
1Q
2
1D
1D
TO SEVEN OTHER CHANNELS
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
INDUSTRIAL TEMPERATURE RANGE
AUGUST 1999
1
© 1999 Integrated Device Technology, Inc.
DSC-4935/1