是否Rohs认证: | 符合 | 生命周期: | Active |
包装说明: | TSSOP, | Reach Compliance Code: | compliant |
HTS代码: | 8542.39.00.01 | 风险等级: | 5.59 |
其他特性: | WITH HOLD MODE | 系列: | LVC/LCX/Z |
JESD-30 代码: | R-PDSO-G20 | JESD-609代码: | e4 |
长度: | 6.5 mm | 逻辑集成电路类型: | D FLIP-FLOP |
湿度敏感等级: | 1 | 位数: | 8 |
功能数量: | 1 | 端子数量: | 20 |
最高工作温度: | 125 °C | 最低工作温度: | -40 °C |
输出极性: | TRUE | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | TSSOP | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH | 传播延迟(tpd): | 15.5 ns |
座面最大高度: | 1.1 mm | 最大供电电压 (Vsup): | 3.6 V |
最小供电电压 (Vsup): | 1.2 V | 标称供电电压 (Vsup): | 1.8 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | AUTOMOTIVE | 端子面层: | Nickel/Palladium/Gold (Ni/Pd/Au) |
端子形式: | GULL WING | 端子节距: | 0.65 mm |
端子位置: | DUAL | 触发器类型: | POSITIVE EDGE |
宽度: | 4.4 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74LVC377PW,112 | NXP |
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74LVC377 - Octal D-type flip-flop with data enable; positive-edge trigger TSSOP2 20-Pin | |
74LVC377PW,118 | NXP |
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74LVC377 - Octal D-type flip-flop with data enable; positive-edge trigger TSSOP2 20-Pin | |
74LVC377PWDH | NXP |
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Octal D-type flip-flop with data enable; positive-edge trigger | |
74LVC377PWDH-T | NXP |
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IC LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, PLASTIC, TS | |
74LVC377PW-T | NXP |
获取价格 |
IC LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20, 4.40 MM, PL | |
74LVC38A | NXP |
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Quad 2-input NAND gate (open drain) | |
74LVC38ABQ | NXP |
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Quad 2-input NAND gate (open drain) | |
74LVC38ABQ,115 | NXP |
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74LVC38A - Quad 2-input NAND gate; open-drain QFN 14-Pin | |
74LVC38AD | NXP |
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Quad 2-input NAND gate (open drain) | |
74LVC38AD,112 | NXP |
获取价格 |
74LVC38A - Quad 2-input NAND gate; open-drain SOIC 14-Pin |