Datasheet > 74LVC1G86GX

74LVC1G86GX

更新时间： 2024-11-28 11:11:43

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
16页	251K
描述
2-input EXCLUSIVE-OR gateProduction

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74LVC1G86GX 数据手册

74LVC1G86

2-input EXCLUSIVE-OR gate

Rev. 13 — 7 January 2022

Product data sheet

1. General description

The 74LVC1G86 provides the 2-input EXCLUSIVE-OR function.

Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of these

devices in a mixed 3.3 V and 5 V environment.

This device is fully specified for partial Power-down applications using I_OFF. The I_OFFcircuitry

disables the output, preventing the damaging backflow current through the device when it is

powered down.

2. Features and benefits

•

Wide supply voltage range from 1.65 V to 5.5 V

•

High noise immunity

Overvoltage tolerant inputs to 5.5 V

Complies with JEDEC standard:

•

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8C (2.7 V to 3.6 V)

JESD36 (4.5 V to 5.5 V)

•

ESD protection:

•

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

•

±24 mA output drive (V_CC= 3.0 V)

CMOS low power dissipation

Latch-up performance exceeds 250 mA

I_OFFcircuitry provides partial Power-down mode operation

Direct interface with TTL levels

Multiple package options

Specified from -40 °C to +85 °C and -40 °C to +125 °C

12 3 4 5 6 7...16

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