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74LVC1G97GM,132 PDF预览

74LVC1G97GM,132

更新时间: 2024-02-04 02:01:17
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
20页 144K
描述
74LVC1G97 - Low-power configurable multiple function gate SON 6-Pin

74LVC1G97GM,132 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:SON包装说明:VSON,
针数:6Reach Compliance Code:compliant
风险等级:0.89系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-N6JESD-609代码:e3
长度:1.45 mm逻辑集成电路类型:LOGIC CIRCUIT
湿度敏感等级:1功能数量:1
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:VSON封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE座面最大高度:0.5 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:DUAL
宽度:1 mmBase Number Matches:1

74LVC1G97GM,132 数据手册

 浏览型号74LVC1G97GM,132的Datasheet PDF文件第2页浏览型号74LVC1G97GM,132的Datasheet PDF文件第3页浏览型号74LVC1G97GM,132的Datasheet PDF文件第4页浏览型号74LVC1G97GM,132的Datasheet PDF文件第5页浏览型号74LVC1G97GM,132的Datasheet PDF文件第6页浏览型号74LVC1G97GM,132的Datasheet PDF文件第7页 
74LVC1G97  
Low-power configurable multiple function gate  
Rev. 3 — 7 December 2011  
Product data sheet  
1. General description  
The 74LVC1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The  
device can be configured as any of the following logic functions MUX, AND, OR, NAND,  
NOR, inverter and buffer; using the 3-bit input. All inputs can be connected to VCC or  
GND.  
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these  
devices as translators in mixed 3.3 V and 5 V environments.  
This device is fully specified for partial power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
2. Features and benefits  
Wide supply voltage range from 1.65 V to 5.5 V  
5 V tolerant input/output for interfacing with 5 V logic  
High noise immunity  
Complies with JEDEC standard:  
JESD8-7 (1.65 V to 1.95 V)  
JESD8-5 (2.3 V to 2.7 V)  
JESD8B/JESD36 (2.7 V to 3.6 V).  
24 mA output drive (VCC = 3.0 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
CMOS low power consumption  
Latch-up performance exceeds 250 mA  
Direct interface with TTL levels  
Inputs accept voltages up to 5 V  
Multiple package options  
Specified from 40 C to +85 C and 40 C to +125 C.  
 
 

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