Datasheet > 74LVC1G00-Q100

74LVC1G00-Q100

更新时间： 2024-11-07 01:16:03

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
11页	203K
描述
Single 2-input NAND gate

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74LVC1G00-Q100 数据手册

74LVC1G00-Q100

Single 2-input NAND gate

Rev. 3 — 7 February 2019

Product data sheet

1. General description

The 74LVC1G00-Q100 provides the single 2-input NAND function.

Input can be driven from either 3.3 V or 5 V devices. These features allow the use of these devices

in a mixed 3.3 V and 5 V environment.

Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.

This device is fully specified for partial power-down applications using I_OFF. The I_OFFcircuitry

disables the output, preventing the damaging backflow current through the device when it is

powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100

(Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

•

Automotive product qualification in accordance with AEC-Q100 (Grade 1)

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

•

Wide supply voltage range from 1.65 V to 5.5 V

High noise immunity

Complies with JEDEC standard:

•

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8-B/JESD36 (2.7 V to 3.6 V)

•

±24 mA output drive (V_CC= 3.0 V)

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Inputs accept voltages up to 5 V

ESD protection:

•

MIL-STD-883, method 3015 exceeds 2000 V

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range

Name

Description

Version

74LVC1G00GW-Q100 -40 °C to +125 °C

TSSOP5

plastic thin shrink small outline package;

5 leads; body width 1.25 mm

SOT353-1

74LVC1G00GV-Q100 -40 °C to +125 °C

SC-74A

plastic surface-mounted package; 5 leads

SOT753

12 3 4 5 6 7...11

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