August 1998
Revised April 1999
74LCXP16245
Low Voltage 16-Bit Bidirectional Transceiver with
5V Tolerant Inputs/Outputs and Pull-Down Resistors
General Description
Features
■ 5V tolerant inputs and outputs
The LCXP16245 contains sixteen non-inverting bidirec-
tional buffers with 3-STATE outputs and is intended for bus
oriented applications. The device is designed for low volt-
age (2.5V or 3.3V) VCC applications with capability of inter-
■ 2.3V–3.6V VCC specifications provided
■ I/O Pull-down resistors terminate inactive busses ensur-
ing a stable bus state
facing to a 5V signal environment. The device is byte
controlled. Each byte has separate control inputs which
could be shorted together for full 16-bit operation. The T/R
inputs determine the direction of data flow through the
device. The OE inputs disable both the A and B ports by
placing them in a high impedance state.
■ 5.5 ns tPD max (VCC = 3.3V), 20 µA ICC max
■ Power down high impedance inputs and outputs
■ Supports live insertion/withdrawal (Note 1)
■ ±24 mA output drive (VCC = 3.0V)
■ Implements patented noise/EMI reduction circuitry
■ Pinout compatible with 74 series 16245
■ Latch-up performance exceeds 500 mA
■ ESD performance:
In addition, A and B port datapath pins have built-in resis-
tors to GND allowing the pins to float without any increase
in ICC current. This feature is intended to address modular
and space constrained applications where additional space
consumed by external resistors is not available.
Human body model > 2000V
The LCXP16245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or down OE
should be tied to V
through a pull-up resistor: the minimum value or the
CC
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCXP16245MEA
74LCXP16245MTD
Package Number
MS48A
Package Description
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
MTD48
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin
Description
Names
OEn
Output Enable Input
T/Rn
Transmit/Receive Input
A0–A15
B0–B15
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation
DS500053.prf
www.fairchildsemi.com