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74HCT377D PDF预览

74HCT377D

更新时间: 2024-11-12 11:13:43
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
15页 251K
描述
Octal D-type flip-flop with data enable; positive-edge triggerProduction

74HCT377D 数据手册

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74HC377; 74HCT377  
Octal D-type flip-flop with data enable; positive-edge trigger  
Rev. 5 — 25 February 2021  
Product data sheet  
1. General description  
The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features  
clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their  
corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH  
clock (CP) transition. Input E must be stable one set-up time prior to the LOW-to-HIGH transition  
for predictable operation. Inputs include clamp diodes that enable the use of current limiting  
resistors to interface inputs to voltages in excess of VCC  
.
2. Features and benefits  
Wide supply voltage range from 2.0 V to 6.0 V  
CMOS low power dissipation  
High noise immunity  
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B  
Complies with JEDEC standards:  
JESD8C (2.7 V to 3.6 V)  
JESD7A (2.0 V to 6.0 V)  
Common clock and master reset  
Eight positive edge-triggered D-type flip-flops  
Input levels:  
For 74HC377: CMOS level  
For 74HCT377: TTL level  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V.  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number Package  
Temperature range Name  
Description  
Version  
74HC377D  
-40 °C to +85 °C  
SO20  
plastic small outline package; 20 leads; body width 7.5 mm SOT163-1  
74HCT377D  
74HC377PW -40 °C to +85 °C  
74HCT377PW  
TSSOP20 plastic thin shrink small outline package; 20 leads;  
body width 4.4 mm  
SOT360-1  
 
 
 

74HCT377D 替代型号

型号 品牌 替代类型 描述 数据表
CD74HCT377M TI

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High-Speed CMOS Logic Octal D-Type Flip-Flop With Data Enable

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